Add largepage support to the arm64 pmap.

[markj]

Harmless typo (L1_BLOCK -> L2_BLOCK in an assertion).

[alc]

All of my recent amd64 comments apply here as well.

[markj]

• Adjust assertion messages.
• Implement pmap_copy() support.

[alc]

sys/arm64/arm64/pmap.c

2922

pmap_l0(pmap, sva) -> l0

3476

I'm confused. l1 can't have ATTR_DESCR_VALID set, but the pmap's resident count isn't being incremented here (like it is below in the else).

3500

Can't the l0 entry be invalid? In which case, l1p will be NULL.

3513

See my earlier comment.

4285

Assert that the l1 entry has the "wired" bit set, like we do below?

[markj]

Address review feedback.

[markj]

sys/arm64/arm64/pmap.c

3476

You're right, I'm not sure why I didn't just follow what the amd64 implementation does.

[alc]

sys/arm64/arm64/pmap.c

1267

Hmm. This is wrong for managed mappings. We should be testing whether the page is supposed to be writeable, not whether we've dirtied it.

[alc]

sys/arm64/arm64/pmap.c

2922–2923

pmap_unuse_pt(pmap, sva, pmap_load(l0), &free);?

3476

Suppose that you are replacing an existing large page mapping. Isn't there still a problem? Because you'll increment the resident count, but you shouldn't.

[markj]

sys/arm64/arm64/pmap.c

1267

Right. We should be checking (tpte & ATTR_SW_DBM) != 0 I believe.

Does this bug impact correctness? If we fail here because the logically writable mapping is clean, then vm_fault_quick_hold_pages()'s fallback logic will invoke the fault handler and locate the page.

I'm not sure about stage2 translations yet.

[markj]

Address feedback:

• Use pmap_unuse_pt().
• Fix resident page accounting, second attempt.

[kib]

sys/arm64/arm64/pmap.c

3496

Don't you need to do some kind of dsb() after store, at least for the new mapping ?

[alc]

sys/arm64/arm64/pmap.c

3496

Yes.

[alc]

sys/arm64/arm64/pmap.c

3478

I don't understand why we do this unconditionally. We don't use mp except in the then clause of the below if statement.

3514

Ditto.

3533

See my amd64 comment.

[markj]

Address feedback:

• When mapping a large page, don't look up the PTP unless we need it.
• Simplify pmap wired count updates.
• Unconditionally issue dsb after updating a large page PTE.

[alc]

sys/arm64/arm64/pmap.c

3520

1G -> 2M

3529

L1_SIZE -> pagesizes[psind]

3532

L1_SIZE -> pagesizes[psind]

[markj]

Address feedback:

• Fix assertion message.
• Correct wired page accounting.