This is a continuation of D17181.
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This diff is generated from the branch where pmap_activate_sw() work was done. I will update the review after the context switch chunks will be committed.
Peter, could you, please, give some run time to this patch ? It is only relevant for amd64, but in two modes, with pcid enabled and with vm.pmap.pcid_enabled=0. In both cases, some threading loads and some mmap tests are enough.
sys/amd64/amd64/pmap.c | ||
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1718 | I would suggest refactoring these sentences: "Because pm_pcid is recalculated on a context switch, we must disable switching. Otherwise, we might use a stale value below." | |
1722 | Arguably, the blank line isn't needed here because the comment above is relevant to this entire block. | |
1745–1752 | This has been deindented by one level. It might be worth reflowing the paragraph. | |
1801–1802 | This is an aside. I wonder how often these days we wake up a halted processor to perform a shootdown on the kernel address space. | |
2020–2021 | Is there any reason for this particular ordering of these statements? Swapping their order, would mean that the variable mask did not have to be live across a function call, and thus the compiler would not have to use a callee-saves register. |
sys/amd64/amd64/pmap.c | ||
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1801–1802 | Given recent changes, we could start using the kernel pmap cpu mask to track which processors actually require shootdown. I know that some of the sleep states actually flush the TLB based on experimental observation, but I don't know what is documented in this regard. |
kernel pmap. Specifically, I would propose clearing the processor's bit in the kernel pmap when it halts. That said, we would still need to have a separate flag indicating when the processor needs to take action when it wakes. (Depending on the documentation of the deeper sleep states maybe that action is a NOP.)