Allow the creation of 3 level page tables
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Authored by andrew on Aug 14 2020, 10:54 AM.

Details

Reviewers

markj
alc
kib
manu

Group Reviewers

arm64

Commits

rS367320: Allow the creation of 3 level page tables on arm64

Summary

The stage 2 arm64 page tables may need to start at a lower level. This
is because we may only be able to map a limited IPA range and trying
to use a full 4 levels will cause the CPU to fault in an unrecoverable
way.

To simplify the code we still allocate the full 4 levels, however level 0
will only ever be used to find the level 1 table used as the base. Handle
this by creating a dummy entry in the level 0 table to point to the level 1
table.

Diff Detail

Lint

Lint Passed

Unit

No Test Coverage

Build Status

Buildable 32991
Build 30380: arc lint + arc unit

Event Timeline

andrew created this revision.Aug 14 2020, 10:54 AM

Herald added a reviewer: manu. · View Herald TranscriptAug 14 2020, 10:54 AM

Herald added a subscriber: emaste. · View Herald Transcript

andrew requested review of this revision.Aug 14 2020, 10:54 AM

Harbormaster completed remote builds in B32991: Diff 75821.Aug 14 2020, 10:54 AM

markj added inline comments.Aug 23 2020, 7:25 PM

sys/arm64/arm64/pmap.c
1693	Maybe s/we are releasing it/until pmap_release() is called/.
1961	Please avoid adding new uses of `boolean_t`, `bool` is fine.
1974	Aren't we leaking the L3 page?
6142	It might be nicer to precompute this value and store it in the pmap, otherwise we are re-computing an effectively constant value on every context switch. That is, store the root paddr in a common field so that we don't need to check `pm_levels`.