Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms
ClosedPublic
Actions

Authored by mw_semihalf.com on Jun 14 2017, 10:52 PM.

Details

Reviewers

• ian
andrew
mmel

Commits

rS320200: Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms

Summary

This patch disables outer cache sync in PL310 driver
by adding "arm,io-coherent" property. In addition to
the previous patches it was the last bit needed
for enabling proper operation of Armada 38x SoCs
with the IO cache coherency.

Diff Detail

Repository

rS FreeBSD src repository - subversion

Lint

Lint Skipped

Unit

Tests Skipped

Event Timeline

mw_semihalf.com created this revision.Jun 14 2017, 10:52 PM

Herald added a subscriber: imp. · View Herald TranscriptJun 14 2017, 10:52 PM

mw_semihalf.com added a parent revision: D11203: Create root DMA tag and fix MBUS windows on DMA coherent platforms.Jun 14 2017, 10:53 PM

Add "arm,io-coherent" to PL310 node (see https://reviews.freebsd.org/D11245)

Do not add redundant 'dma-coherent', and add the property only for the PL310 node. Unlike linux, we do not have to do it in runtime, hacking the platform code.

mmel accepted this revision.Jun 21 2017, 1:57 PM

This revision is now accepted and ready to land.Jun 21 2017, 1:57 PM

Closed by commit rS320200: Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms (authored by zbb). · Explain WhyJun 21 2017, 6:29 PM

This revision was automatically updated to reflect the committed changes.

Revision Contents
Changeset List

Path

Size

sys/

boot/

fdt/

dts/

arm/

armada-38x.dtsi

1 line

Diff 29898

View Options

sys/boot/fdt/dts/arm/armada-38x.dtsi

Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platformsClosedPublicActions