Each level of CPUID leaf 0Bh or 1Fh reports the shift that addresses
the next level up. Leaf 0Bh has only the SMT and core levels, so the
core level's shift identifies the package. Leaf 1Fh may enumerate
module, tile, die and die group levels above the core level, and then
the core level's shift identifies one of those instead.
topo_probe_intel_0xb() used the core level's shift for the package in
both cases. On a processor that enumerates a module level, every module
became a package, and the L3 cache was cut down to the module with
"WARNING: L3 data cache covers more APIC IDs than a package", so the
scheduler did not see that the modules share it. An Atom x7809C
(Amston Lake), which reports shifts of 1, 3 and 7 for its SMT, core and
module levels, came up as two packages of four cores. The Alder Lake-N
family is affected in the same way, as in the PR.
Use the shift of the last level enumerated for the package. This also covers
a leaf that reports only an SMT level, which used to make every thread a
package. While here, end the enumeration at a level that reports no logical
processors as well as at an invalid level type.
PR: 297032
Fixes: 6badb512a94d ("Prefer CPUID leaf 1Fh for Intel CPU...")
MFC after: 1 month
Sponsored by: Rubicon Communications, LLC ("Netgate")