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x86: Handle when MPERF/APERF MSRs aren't writable
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Authored by ziaee on Fri, Mar 20, 6:35 PM.
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Details

Summary

"For performance and/or correct reasons some hypervisors allow
MPERF/APERF MSRs to be read but not written to. This change
modifies the handling of these MSRs to not rely on writes."

This patch is part of Google Cloud Engine C4-lssd turnup.

Proxied on behalf of Matt Delco <delco@google.com>, note that
I (ziaee) do not understand what is going on here whatsoever.

Sponsored by: Google

Diff Detail

Repository
rG FreeBSD src repository
Lint
Lint Skipped
Unit
Tests Skipped
Build Status
Buildable 71594
Build 68477: arc lint + arc unit

Event Timeline

ziaee requested review of this revision.Fri, Mar 20, 6:35 PM
ziaee created this revision.
This revision is now accepted and ready to land.Sat, Mar 21, 1:08 AM
sys/x86/x86/cpu_machdep.c
463

This is to avoid division by zero, I assume, but that is a separate issue that could occur with the existing code in the same situation, i.e. if DELAY(1000) isn't enough to make them tick up (or they exactly wrap around). If you want to make that change it should be a separate commit, though start_TSC is supposed to be catching this possibility, no? (Not sure exactly what the conditions are here for when each snippet runs...)

sys/x86/x86/tsc.c
446

Hm, being read-only is a bit different. The "test whether they really work" is to make sure that they tick up. I think you just want to add the read-only part as a separate sentence afterwards?

452–454

Rogue space before the closing parenthesis, and no need to add the braces

overall looks good

sys/x86/x86/tsc.c
436

presumably?

Looks good modulo jrtc27's suggestions.

sys/x86/x86/cpu_machdep.c
463

It's true the same possibility exists with the original code. Given what is done is start_TSC(), that can appear redundant, but really we should prepare for weird emulator behaviors, and this test costs basically nothing, so IMO it should be done (whether in a separate commit or here in passing).

sys/x86/x86/tsc.c
435–436

Typo here (existing patch should not compile).

ziaee marked 3 inline comments as done.

Fix redundant space, braces, and uint64_t typo. The typos were my mistake in transcribing the patch. Thanks for looking this over! I'll send this back to Matt this week for the other feedback.

This revision now requires review to proceed.Sun, Mar 22, 9:38 PM
markj added inline comments.
sys/x86/x86/cpu_machdep.c
465

The indentations of these lines looks wrong, there should be tab indent.

This revision is now accepted and ready to land.Mon, Mar 23, 12:34 AM
sys/x86/x86/cpu_machdep.c
465

This is my mistake in transcribing. I thought after the second indent we use 4 spaces, but I think I see it's more complex than that.

split out divide by zero, and attempt to improve tsc comment

This revision now requires review to proceed.Tue, Mar 24, 4:48 AM
ziaee retitled this revision from sys/x86/x86: Handle when MPERF/APERF MSRs aren't writable to x86: Handle when MPERF/APERF MSRs aren't writable.

oops, forgot to fix the actual check

This revision is now accepted and ready to land.Thu, Mar 26, 4:49 PM
sys/x86/x86/tsc.c
448

One nit