Introduce support for Annapurna Alpine CCU and NB devices

[mst_semihalf.com]

Summary

This commit adds drivers for Alpine Cache Coherency Unit and North Bridge Service whose task is to configure the system fabric and enable cache coherency.

[andrew]

sys/conf/files.arm64

2–3

These should be selected based on a device entry, the soc_* names are used to add an SoC specific attachment for an existing driver.

[mst_semihalf.com]

sys/conf/files.arm64

2–3

OK, I can change it to device entries instead.

[mst_semihalf.com]

Use device entries al_ccu and al_nb_service instead of SOC option.

[andrew]

sys/arm/annapurna/alpine/alpine_ccu.c

37

From style(9):

...include <sys/types.h> OR <sys/param.h>, but not both.

42

No need to include sys/bus.h twice.

81

Why is this BUS_PASS_CPU?

100–113

Why is this a separate function? It's short and only called from one place.

sys/arm/annapurna/alpine/alpine_nb_service.c

33–42

See above for comments on these includes.

80

Why is this BUS_PASS_CPU?

100

Why an separate function?

sys/arm64/conf/GENERIC

92–93 ↗

(On Diff #19542)

You should add a comment to explain what these are for and add a header with something like Annapurna Alpine drivers above them.

sys/conf/files

79–80 ↗

(On Diff #19542)

These should be in files.arm and files.arm64 as they are specific to these. They should also depend on fdt as there are no ACPI bindings.

[mst_semihalf.com]

sys/arm/annapurna/alpine/alpine_ccu.c

81

These drivers need to attach quite early, earlier than PCI and other devices, but later than simplebus. I saw that psci used BUS_PASS_CPU. Which BUS_PASS would you propose?

100–113

I thought it was nicer but I can move it to attach() if you like.

[mst_semihalf.com]

Fix style issues raised in review.

[wma]

It seems that all reported issues were fixed.
Looks good to me, so I'll commit the patch tomorrow if no other problem is raised by then.