hwpmc_amd: Service the core counters when IBS claims the NMI

[ojanerif_amd.com]

Summary

IBS and the core counters share the PMC NMI. amd_intr() and
amd_intr_v2() return as soon as pmc_ibs_intr() claims an NMI, so a core
counter overflow that arrives with the same NMI is not serviced: the
counter is not reloaded and sampling with it stops.

Service the core counters after pmc_ibs_intr() and claim the NMI if
either side found work. An NMI that IBS claimed no longer uses up a
core stray-NMI credit. With no core counter sampling, amd_intr_v2()
still returns right after IBS, without freezing the core counters.

Add a test that samples unhalted cycles on cpu0 alone and then next to
IBS op, and requires the second phase to keep at least half of the
core samples.

Sponsored by: Advanced Micro Devices, Inc.

Test Plan

EPYC 9654 (Zen 4, PerfMonV2), main 6d5c80aee3ae GENERIC-NODEBUG with
hwpmc as a module (sys/dev/hwpmc is unchanged in main since then).
unhalted-cycles sampling at 1000000 on a busy CPU 0, 20 s alone and then
20 s together with ibs-op at 65536 on the same CPU:

                    core alone   core with IBS   IBS samples
stock hwpmc.ko          73,660               1     1,073,597
with this change        73,653          73,145     1,073,190

tests/sys/pmc/amd/ibs_core_test fails in 3 of 3 runs with the stock
module and passes in 3 of 3 with this change. The test also builds
with the WARNS=6 flags. The amd_intr() path (Zen 1 to 3, without
PerfMonV2) is only compile-tested.

The diff applies to main by itself, and on top of D60186 through
D61370.