dev/hwpmc: Add interrupt callback for arm64

[sarah.walker2_arm.com]

Summary

Add a callback to allow additional drivers to capture state on PMC interrupt.
This is required to integrate extensions such as BRBE.

Sponsored by: Arm Ltd

[ali_mashtizadeh.com]

So is the reason we aren't hard coding this and integrating BRBE into the pmc module is that it will be used by hwt as well? Is this best exposed through hwt or is it just extended data that can be exposed throught he multipart flag I added for AMD IBS? The multipart flag lets you add arbitrary payloads alongside a counter. LBR will be using this as well.

Only problem I can see is the potential race on an unload when setting pmc_intr_callback to NULL.

[sarah.walker2_arm.com]

In D58534#1345234, @ali_mashtizadeh.com wrote:

So is the reason we aren't hard coding this and integrating BRBE into the pmc module is that it will be used by hwt as well? Is this best exposed through hwt or is it just extended data that can be exposed throught he multipart flag I added for AMD IBS? The multipart flag lets you add arbitrary payloads alongside a counter. LBR will be using this as well.

Only problem I can see is the potential race on an unload when setting pmc_intr_callback to NULL.

It was decided that hwt was the best method to use for dumping BRBE samples, however BRBE uses the PMC interrupt which hwpmc owns. Integrating the BRBE functionality into hwpmc would therefore add a dependency between hwpmc and hwt which seemed less than ideal, hence this approach.

[ali_mashtizadeh.com]

In D58534#1345537, @sarah.walker2_arm.com wrote:

In D58534#1345234, @ali_mashtizadeh.com wrote:

So is the reason we aren't hard coding this and integrating BRBE into the pmc module is that it will be used by hwt as well? Is this best exposed through hwt or is it just extended data that can be exposed throught he multipart flag I added for AMD IBS? The multipart flag lets you add arbitrary payloads alongside a counter. LBR will be using this as well.

Only problem I can see is the potential race on an unload when setting pmc_intr_callback to NULL.

It was decided that hwt was the best method to use for dumping BRBE samples, however BRBE uses the PMC interrupt which hwpmc owns. Integrating the BRBE functionality into hwpmc would therefore add a dependency between hwpmc and hwt which seemed less than ideal, hence this approach.

Hello Sarah,

I'm concurrently working with the AMD folks that are adding LBR the equivalent feature for x86.

Please correct me if I'm wrong, but BRBE also can freeze on a perf counter overflow (FZP bit) so we would want to attach it to the performance counters. We should introduce a per counter flag that will collect BRBE or LBR data as a payload to any supported counter. In the interrupt handler for the performance counters you can use the multipart function (see [1] below) to include the branch history payload inside the pmc event. Given how much data there is it might make more sense to add an explicit callback to fill in the pmc buffer rather than call the MP function that requires copying it onto the stack.

In addition to using it for PGO, this helps improve performance counter analysis by giving us precise branch traces. It would ideal we agree on a common per counter flag/capability bits so both systems can use the same interface.

[1] https://github.com/freebsd/freebsd-src/blob/4dc196233e406cd30b9b1936adb91381f6892a6a/sys/dev/hwpmc/hwpmc_ibs.c#L673

@mhorne @imp @afscoelho_gmail.com @raghavendra.kt_amd.com

Best,
Ali

[mhorne]

On arm64, the hwpmc interrupt (arm64_intr()) is dispatched from the PMU driver: pmu_intr() in sys/arm/arm/pmu.c.

I think this is the place where a new callback should be registered and invoked.