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Is the associated hardware documentation public, and if so, could you link to it?
| sys/x86/cpufreq/hwpstate_amd.c | ||
|---|---|---|
| 536–537 | Missing break | |
| sys/x86/cpufreq/hwpstate_amd.c | ||
|---|---|---|
| 95–97 | I think we can just keep using the 17H macros for these three fields that didn't change? (IDIV, IDD, VID) | |
I found it in volume 1 here: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/57896.zip
| sys/x86/cpufreq/hwpstate_amd.c | ||
|---|---|---|
| 93 | This comment is repeated below, so isn't really needed here. | |
| 171 | As a matter of style, it'd be a bit nicer to return the value instead of writing through a pointer. | |
| 489 | ||
| 491 | According to the PPR, fid <= 0xf is a reserved value. Should we report an error in that case, instead of silently leaving the frequency unset? | |
BTW, is hwpstate_amd quite older than intel one? I thought it don't have autonomous mode and it throttling all cpu into same freqs.
Indeed, it doesn't implement the CPPC interfaces. As far as I know, we just rely on the platform firmware to handle CPU power management.
Tested together with aokblast yesterday on Framework 16 (Ryzen 4) and it seems to work with case 0x19:.
Frequency can't correctly be reported but from the temperature reading it seems that very likely the frequency is scaled.
Does frequency reporting work correctly on ryzen 5?
It doesn't report the correct freq from zen5 (observed from htop). We can only observe a static frequency instead of dynamically changed. I will create a patch about zen4 later