x86: Allow sharing of perfomance counter interrupts

[bnovkov]

Summary

This patch refactors the Performance Counter interrupt setup code to allow sharing the interrupt line between multiple drivers.
More specifically, Performance Counter interrupts are used by both hwpmc(4) and hwt(4)'s Intel Processor Trace backend.

[kib]

sys/x86/x86/local_apic.c

816–817

Why do we need these braces? Why not provide pcint() services regardless of hwpmc/hwt? IMO it is more logical, and slight unconditional code addition does not matter for amd64. But we reduce the ifdef maze then.

[bnovkov]

Address @kib 's comments.

[bnovkov]

sys/x86/x86/local_apic.c

816–817

Right, the initial version was a knee-jerk reaction, what you suggested makes sense.

[kib]

sys/x86/x86/local_apic.c

39

Are both opts still needed?