sifive_prci: Delay attachment until after clk_fixed

[jrtc27]

Summary

This avoids noisy output from early attempts to attach before clk_fixed
has attached to the parent clocks.

[manu]

Will that work with BUS_PASS_BUS + BUS_PASS_ORDER_LATE ?
That's usually what we do (i.e. not using direct numbers but only the defines).

[jrtc27]

In D31023#698207, @manu wrote:

Will that work with BUS_PASS_BUS + BUS_PASS_ORDER_LATE ?
That's usually what we do (i.e. not using direct numbers but only the defines).

Good question, I wrote this a few weeks ago and don't recall whether there was a reason why I didn't do that... I'll try it out and see if that breaks something in later passes.

[jrtc27]

BUS_PASS_ORDER_LATE works just fine instead of BUS_PASS_ORDER_MIDDLE + 1