i386: Make setidt_disp a size_t instead of uintptr_t

[markj]

Summary

setidt_disp is the offset of the ISR trampoline relative to the address
of the routines in exception.s, so uintptr_t is not quite right.

Also remove a bogus declaration I added in a previous commit, I'm not
sure why I thought it was required.

[jrtc27]

Thanks :)

sys/i386/i386/machdep.c

static struct soft_segment_descriptor ldt_segs[] = {
         .ssd_type = SDT_MEMRWA,
         .ssd_dpl = SEL_UPL,
         .ssd_p = 1,
         .ssd_xx = 0, .ssd_xx1 = 0,
         .ssd_def32 = 1,
         .ssd_gran = 1           },
 };
 
-uintptr_t setidt_disp;
+size_t setidt_disp;
 
 void
 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
 {
         uintptr_t off;
 
         off = func != NULL ? (uintptr_t)func + setidt_disp : 0;
         setidt_nodisp(idx, off, typ, dpl, selec);

sys/i386/include/md_var.h

 #ifdef COMPAT_FREEBSD4
 extern  int     szfreebsd4_sigcode;
 #endif
 #ifdef COMPAT_43
 extern  int     szosigcode;
 extern  int     sz_lcall_tramp;
 #endif
 extern  vm_offset_t proc0kstack;
-extern  uintptr_t setidt_disp;
+extern  size_t setidt_disp;
 
 struct  segment_descriptor;
 union savefpu;
 
 int        cp_slow0(vm_offset_t uva, size_t len, bool write,
             void (*f)(vm_offset_t, void *), void *arg);
 void        cpu_switch_load_gs(void) __asm(__STRING(cpu_switch_load_gs));
 void    copyout_init_tramp(void);

sys/x86/x86/local_apic.c

while (lapic_read_icr_lo() & APIC_DELSTAT_PEND)
                         ia32_pause();
 #endif /* needsattention */
         }
 #endif /* DETECT_DEADLOCK */
 }
 
 #endif /* SMP */
 
-#ifdef __i386__
-extern uintptr_t setidt_disp;
-#endif
-
 /*
  * Since the IDT is shared by all CPUs the IPI slot update needs to be globally
  * visible.
  *
  * Consider the case where an IPI is generated immediately after allocation:
  *     vector = lapic_ipi_alloc(ipifunc);
  *     ipi_selected(other_cpus, vector);
  *