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arm64: Increase NIRQ to 16k
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Authored by scottph on Oct 13 2020, 7:21 PM.
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emaste
imp
jhb

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andrew
gonzo
mhorne
manu
jhb
Commits
rS366715: arm64: Increase NIRQ to 16k
Summary

Ampere Altra in a dual socket configuration has 12 ITSes for the
12 PCIe root complexes. The NIRQ interrupts are statically split
between each child of the gic bus, so we need to increase that
value. 16k is enough for

(#cpus * #its * max_pcie_bifurcation) LPIs + (#SPIs and #PPIs)

Sponsored by: Ampere Computing

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rS FreeBSD src repository - subversion
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Event Timeline

scottph created this revision.Oct 13 2020, 7:21 PM
Herald added a reviewer: manu. · View Herald TranscriptOct 13 2020, 7:21 PM
Herald added subscribers: emaste, imp. · View Herald Transcript
scottph requested review of this revision.Oct 13 2020, 7:21 PM
scottph added a comment.Oct 13 2020, 8:44 PM

This increases bss by ~1.5 MiB

emaste added a subscriber: jhb.Oct 13 2020, 9:20 PM
jhb accepted this revision.Oct 13 2020, 10:09 PM

If possible, I would encourage you to explore making these things tunable and more dynamic ala rS338360, rS340460, and rS340488.

This revision is now accepted and ready to land.Oct 13 2020, 10:09 PM
Closed by commit rS366715: arm64: Increase NIRQ to 16k (authored by scottph). · Explain WhyOct 15 2020, 3:12 AM
This revision was automatically updated to reflect the committed changes.
scottph added a commit: rS366715: arm64: Increase NIRQ to 16k.

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head/
sys/
arm64/
include/
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head/sys/arm64/include/intr.h

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