Add GPIO support for QorIQ boards.

[dgr_semihalf.com]

Summary

Tested on and targeted for LS1046A.
The driver implements the following features:

• setting direction of each pin (IN or OUT)
• setting the mode of output pins (PUSHPULL or OPENDRAIN)
• setting the state of each output pin (1 or 0)
• reading the state of each input pin (1 or 0)

[manu]

sys/conf/files.arm64

196 ↗

(On Diff #70373)

Do not depend on gpio, add a new driver name to GENERIC and depend on this (and the SOC_ option).

[dgr_semihalf.com]

Added SOC_NXP_LS1046A dependency.

[manu]

sys/arm64/qoriq/ls1046_gpio.c

126 ↗

(On Diff #71201)

Could you add the gpio_pin_access_32/gpio_pin_config_32 while you're at it please ?

267 ↗

(On Diff #71201)

You have DEFAULT_CAPS as a mask to check against.

287 ↗

(On Diff #71201)

gp_flags = flags and remove the line above.

321 ↗

(On Diff #71201)

I don't see this property in the binding docs

368 ↗

(On Diff #71201)

You should right the pin name, as a default do :
snprintf(name, GPIOMAXNAME, "pin %d", pin);

468 ↗

(On Diff #71201)

You should lock and use the internal function to avoid any race.

[dgr_semihalf.com]

Thanks, I'll prepare patch in the coming days.

[dgr_semihalf.com]

Added pin_access_32 and pin_config_32 functions.
Changed get_name function to generate "pin <pin_number>" as name.
Additional minor fixes.

[dgr_semihalf.com]

sys/arm64/qoriq/ls1046_gpio.c

267 ↗

(On Diff #71201)

This part did not check if capabilities are supported but checked if some impossible condition doesn't happen, such as both input and output flag set.
Since this could have gotten confusing I moved the check outside pin count check and added comment.

321 ↗

(On Diff #71201)

I removed it.

[dgr_semihalf.com]

Hi, if you have any more comments or remarks, please let me know. Thanks.

[manu]

sys/conf/files.arm64

196 ↗

(On Diff #70373)

This comment still applies, add a new ls1046_gpio driver in GENERIC and depend on it here.

[dgr_semihalf.com]

Add ls1046_gpio device in kernel config. Replace SOC_NXP_LS1046 with SOC_NXP_LS.