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Execute PL310_ERRATA_727915 only for related revisions
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Authored by mw_semihalf.com on Mar 31 2017, 2:35 PM.

Details

Summary

Part of PL310 erratum 727915 in pl310_wbinv_range() was
executed uncoditionally for all possible controllers'
revisions. This patch adds appropriate condition, since
extra operations are required only for revisions between
r2p0 and r3p0.

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by:
Differential revision:

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Repository
rS FreeBSD src repository
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Automatic diff as part of commit; lint not applicable.
Unit
Automatic diff as part of commit; unit tests not applicable.

Event Timeline

andrew requested changes to this revision.Mar 31 2017, 3:34 PM

This should be runtime detected.

This revision now requires changes to proceed.Mar 31 2017, 3:34 PM
loos added a subscriber: loos.Mar 31 2017, 6:26 PM
mmel edited edge metadata.Apr 1 2017, 7:48 AM

Armada38x have Marvell specific (or modified) PL310 ? If not then all errata fixes (but two at line 274 and 295) are checked online. Why do you want to disable them? Do you have measured impact caused by these tests?

Thanks. I'll confirm this and either abandon this patch or get back with something cleaner.

Ok, checked - Armada38x comprises r3p3 cache controller revision. I'm uploading second version of the patch, which adds missing condition checks for PL310_ERRATA_727915.

mw_semihalf.com edited edge metadata.
mw_semihalf.com retitled this revision from Do not activate errata in PL310 for Armada38x to Execute PL310_ERRATA_727915 only for related revisions.
mw_semihalf.com edited the summary of this revision. (Show Details)
emaste added a subscriber: emaste.Apr 13 2017, 5:49 PM
mmel accepted this revision.Apr 16 2017, 1:21 PM

Thanks.

This revision is now accepted and ready to land.Apr 16 2017, 1:21 PM
This revision was automatically updated to reflect the committed changes.