arm: fix atomic_testand{set,clear}_64 for ops on high bits
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Authored by rlibby on Jan 2 2021, 8:29 PM.

Details

Reviewers

andrew
• ian
kib
markj
mmel

Commits

rG486580c44ce2: arm: fix atomic_testand{set,clear}_64 for ops on high bits

Summary

The fix in bd03acedb804add1e22178d50eb2bfb703974ddf worked for 32-bit
ops, and for 64-bit ops for bit arguments of 0 - 95, but then was broken
for operations on the high 32 bits after that.

Test Plan

So far just buildkernel, I haven't been able to get qemu-system-arm working.

Diff Detail

Repository

rS FreeBSD src repository - subversion

Lint

Lint Passed

Unit

No Test Coverage

Build Status

Buildable 35862
Build 32751: arc lint + arc unit

Event Timeline

rlibby created this revision.Jan 2 2021, 8:29 PM

Herald added a subscriber: imp. · View Herald TranscriptJan 2 2021, 8:29 PM

rlibby requested review of this revision.Jan 2 2021, 8:29 PM

Harbormaster completed remote builds in B35862: Diff 81520.Jan 2 2021, 8:29 PM

rlibby mentioned this in D27895: arm: atomic_testand{set,clear} didn't follow atomic(9) API.Jan 2 2021, 8:30 PM

Ohh right, my next mistake. Seems I have not lucky day today :(
Thanks for fixing my stupid bugs.

This revision is now accepted and ready to land.Jan 2 2021, 8:49 PM

markj accepted this revision.Jan 2 2021, 9:18 PM

Closed by commit rG486580c44ce2: arm: fix atomic_testand{set,clear}_64 for ops on high bits (authored by rlibby). · Explain WhyJan 3 2021, 2:11 AM

This revision was automatically updated to reflect the committed changes.

rlibby added a commit: rG486580c44ce2: arm: fix atomic_testand{set,clear}_64 for ops on high bits.

Revision Contents
Changeset List

Path

Size

sys/

arm/

include/

atomic-v6.h

6 lines

Diff 81520

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sys/arm/include/atomic-v6.h

	Show First 20 Lines • Show All 308 Lines • ▼ Show 20 Lines
	. elif ${CPUTYPE} == "ultrasparc3"			. elif ${CPUTYPE} == "ultrasparc3"
	MACHINE_CPU = v9 ultrasparc ultrasparc3			MACHINE_CPU = v9 ultrasparc ultrasparc3
	. endif			. endif
	. endif			. endif
	.endif			.endif

	.if ${MACHINE_CPUARCH} == "mips"			.if ${MACHINE_CPUARCH} == "mips"
	CFLAGS += -G0			CFLAGS += -G0
				AFLAGS+= -${MIPS_ENDIAN} -mabi=${MIPS_ABI}
				CFLAGS+= -${MIPS_ENDIAN} -mabi=${MIPS_ABI}
				LDFLAGS+= -${MIPS_ENDIAN} -mabi=${MIPS_ABI}
	. if ${MACHINE_ARCH:Mmipsel} != ""			. if ${MACHINE_ARCH:Mmipsel} != ""
	AFLAGS += -EL			MIPS_ENDIAN= EL
	CFLAGS += -EL
	LDFLAGS += -EL
	. else			. else
	AFLAGS += -EB			MIPS_ENDIAN= EB
	CFLAGS += -EB
	LDFLAGS += -EB
	. endif			. endif
	. if ${MACHINE_ARCH:Mmips64*} != ""			. if ${MACHINE_ARCH:Mmips64*} != ""
	AFLAGS+= -mabi=64			MIPS_ABI?= 64
	CFLAGS+= -mabi=64
	LDFLAGS+= -mabi=64
	. elif ${MACHINE_ARCH:Mmipsn32*} != ""			. elif ${MACHINE_ARCH:Mmipsn32*} != ""
	AFLAGS+= -mabi=n32			MIPS_ABI?= n32
	CFLAGS+= -mabi=n32
	LDFLAGS+= -mabi=n32
	. else			. else
	AFLAGS+= -mabi=32			MIPS_ABI?= 32
	CFLAGS+= -mabi=32
	LDFLAGS+= -mabi=32
	. endif			. endif
	. if ${MACHINE_ARCH:Mmips*hf}			. if ${MACHINE_ARCH:Mmips*hf}
	CFLAGS += -mhard-float			CFLAGS += -mhard-float
	. else			. else
	CFLAGS += -msoft-float			CFLAGS += -msoft-float
	. endif			. endif
	.endif			.endif

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arm: fix atomic_testand{set,clear}_64 for ops on high bitsClosedPublicActions