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SMMU pmap routines added
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Authored by br on Oct 20 2020, 9:52 AM.
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Details

Summary

Add routines to manage SMMU page tables

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br requested review of this revision.Oct 20 2020, 9:52 AM
sys/arm64/arm64/pmap.c
3702

pmap_sremove_pages() would better match the names of the native routines. pmap_remove_all() removes all managed mappings of a given page.

3749

Can we have a block here? pmap_senter() does not create them.

3763

Debug printf

Also don't we need to unwire the L3 page once for each valid entry?

o Rename pmap_sremove_all() to pmap_sremove_pages()
o Remove unneeded check for L2_BLOCK in pmap_sremove_pages()

sys/arm64/arm64/pmap.c
3702

Thanks, renamed!

3749

Not needed. So I removed it.
Thanks!

3763

I could not find any debug printf macro, do we have any ?

This function is called when no L3 pages are mapped, so if any valid L3 page present it just returns error and pmap will not be released by IOMMU code.
(we can replace to panic, any other ideas ?)

sys/arm64/arm64/pmap.c
3630

Why is the user bit being set?

3690

It's not necessary to do any kind of TLB invalidation here?

3713

These declarations of type vm_page_t can be in a single line.

3719

Can't we stop iterating once sva > VM_MAXUSER_ADDRESS?

3763

I see. If this condition is not expected to occur it should be a panic(). If you want to keep the printf() I'd put it under ifdef DIAGNOSTIC.

sys/arm64/arm64/pmap.c
3630

Maybe because iommu addresses are below VM_MAXUSER_ADDRESS ?

I receive this event otherwise (i.e. without ATTR_S1_AP_USER bit):
smmu0: Event F_PERMISSION (Permission fault occurred on page access.) received.

3690

SMMU has its own TLB that can be invalidated in the SMMU driver only, so we proceed invalidatation in the driver just after calling this function.

3713

Fixed.

3719

Sure!

3763

Ok, I've replaced the printf call with panic()

I have no objection to the change. I'm not really convinced it needs to be part of the pmap code, instead of a self-contained module in the SMMU driver, but I can see why it's convenient.

sys/arm64/arm64/pmap.c
3630

The bit controls access permission from EL0. I'm not sure how that meaning is translated when using the SMMU.

3659

We should modify the pmap's resident count here.

Manage resident count for L3 pages of SMMU pmap

sys/arm64/arm64/pmap.c
3630

Yes, I think ATTR_S1_AP_USER instructs SMMU to use page table base register from TTB0 register.
We only set pointer to page directory in TTB0 register of a context descriptor, and TTB1 is zero.

3659

Added here and in pmap_sremove().

This revision is now accepted and ready to land.Nov 2 2020, 6:03 PM
This revision was automatically updated to reflect the committed changes.