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Optimize riscv's cpu_fetch_syscall_args()
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Authored by trasz on Sep 23 2020, 11:31 AM.
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Details

Summary

Optimize riscv's cpu_fetch_syscall_args(), making it possible
for the compiler to inline the memcpy.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Event Timeline

arichardson added a subscriber: arichardson.

If anyone is interested, here is some compiler output to show that the latest version avoids a branch compared to the first one: https://cheri-compiler-explorer.cl.cam.ac.uk/z/T4fdEa

This revision is now accepted and ready to land.Oct 1 2020, 3:42 PM
mhorne added inline comments.
sys/riscv/riscv/trap.c
101 ↗(On Diff #77728)

No longer needed.

124 ↗(On Diff #77728)

Should be dst_ap ?

trasz marked 2 inline comments as done.Oct 1 2020, 6:50 PM
trasz added inline comments.
sys/riscv/riscv/trap.c
124 ↗(On Diff #77728)

Sigh, you're right. It's been manually cherry-picked from another tree.

trasz marked an inline comment as done.

Make it actually build.

This revision now requires review to proceed.Oct 1 2020, 6:50 PM

Looks good. Presumably this passed basic testing in CheriBSD?

This revision is now accepted and ready to land.Oct 1 2020, 7:04 PM

Yes, it passed our basic CI testing (boot to multiuser, SSH in, run our own cheri(abi)test unit test programs and run the cat kyua tests).

NB: arm and arm64 are the same as riscv currently is, so if we're changing riscv we should really make the same change to those two ports too.