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Differential D15090

HWPMC tracing support (4) -- ARM Coresight
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Authored by br on Apr 16 2018, 1:30 PM.
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andrew
emaste

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kib
markj
manu

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Event Timeline

br created this revision.Apr 16 2018, 1:30 PM
Herald added subscribers: emaste, andrew. · View Herald TranscriptApr 16 2018, 1:30 PM
br added reviewers: emaste, markj.Apr 16 2018, 1:35 PM
br added a parent revision: D12875: HWPMC tracing support (1) -- main.
br updated this revision to Diff 41625.Apr 18 2018, 3:41 PM

use osd(9)

br updated this revision to Diff 41691.Apr 20 2018, 2:42 PM

release object reference obtained by osd(9)

br updated this revision to Diff 42984.May 25 2018, 3:15 PM

Regenerate patch

Herald added a reviewer: manu. · View Herald TranscriptMay 25 2018, 3:15 PM
br updated this revision to Diff 43134.May 30 2018, 1:24 PM

merge changes from upstream

br updated this revision to Diff 43244.Jun 1 2018, 5:02 PM

regenerate

br updated this revision to Diff 46200.Aug 2 2018, 6:00 PM
br removed reviewers: emaste, manu.

regenerate

Herald added a reviewer: manu. · View Herald TranscriptAug 2 2018, 6:00 PM
br removed a reviewer: manu.Aug 2 2018, 6:00 PM
Herald added a reviewer: manu. · View Herald TranscriptAug 2 2018, 6:00 PM
br updated this revision to Diff 52221.Dec 21 2018, 1:19 PM

regenerate

br updated this revision to Diff 53062.Jan 21 2019, 5:59 PM

fix style issues (wrap long lines)

br updated this revision to Diff 53159.Jan 24 2019, 5:58 PM

coresight_allocate() and coresight_release() calls added

br updated this revision to Diff 62993.Oct 7 2019, 4:16 PM

Regenerate patch.

Revision Contents
Changeset List

PathSize
sys/
arm64/
include/
9 lines
conf/
1 line
dev/
hwpmc/
9 lines
70 lines
723 lines

Diff 52221

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sys/arm64/include/pmc_mdep.h

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* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _MACHINE_PMC_MDEP_H_ #ifndef _MACHINE_PMC_MDEP_H_
#define _MACHINE_PMC_MDEP_H_ #define _MACHINE_PMC_MDEP_H_
#ifdef _KERNEL
struct pmc_mdep;
#endif
#define PMC_MDEP_CLASS_INDEX_ARMV8 1 #define PMC_MDEP_CLASS_INDEX_ARMV8 1
#define PMC_MDEP_CLASS_INDEX_CORESIGHT 2
/* /*
* On the ARMv8 platform we support the following PMCs. * On the ARMv8 platform we support the following PMCs.
* *
* ARMV8 ARM Cortex-A53/57/72 processors * ARMV8 ARM Cortex-A53/57/72 processors
*/ */
#include <dev/hwpmc/hwpmc_arm64.h> #include <dev/hwpmc/hwpmc_arm64.h>
#include <dev/hwpmc/hwpmc_cs.h>
union pmc_md_op_pmcallocate { union pmc_md_op_pmcallocate {
struct pmc_md_coresight_op_pmcallocate pm_coresight;
uint64_t __pad[4]; uint64_t __pad[4];
}; };
/* Logging */ /* Logging */
#define PMCLOG_READADDR PMCLOG_READ64 #define PMCLOG_READADDR PMCLOG_READ64
#define PMCLOG_EMITADDR PMCLOG_EMIT64 #define PMCLOG_EMITADDR PMCLOG_EMIT64
#ifdef _KERNEL #ifdef _KERNEL
union pmc_md_pmc { union pmc_md_pmc {
struct pmc_md_arm64_pmc pm_arm64; struct pmc_md_arm64_pmc pm_arm64;
struct pmc_md_coresight_pmc pm_coresight;
}; };
#define PMC_IN_KERNEL_STACK(S,START,END) \ #define PMC_IN_KERNEL_STACK(S,START,END) \
((S) >= (START) && (S) < (END)) ((S) >= (START) && (S) < (END))
#define PMC_IN_KERNEL(va) INKERNEL((va)) #define PMC_IN_KERNEL(va) INKERNEL((va))
#define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS) #define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
#define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_lr) #define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_lr)
#define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_x[29]) #define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_x[29])
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sys/conf/files.arm64

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dev/axgbe/xgbe-drv.c optional axgbe dev/axgbe/xgbe-drv.c optional axgbe
dev/axgbe/xgbe-mdio.c optional axgbe dev/axgbe/xgbe-mdio.c optional axgbe
dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/cpufreq/cpufreq_dt.c optional cpufreq fdt
dev/iicbus/twsi/mv_twsi.c optional twsi fdt dev/iicbus/twsi/mv_twsi.c optional twsi fdt
dev/iicbus/twsi/a10_twsi.c optional twsi fdt dev/iicbus/twsi/a10_twsi.c optional twsi fdt
dev/iicbus/twsi/twsi.c optional twsi fdt dev/iicbus/twsi/twsi.c optional twsi fdt
dev/hwpmc/hwpmc_arm64.c optional hwpmc dev/hwpmc/hwpmc_arm64.c optional hwpmc
dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/hwpmc/hwpmc_arm64_md.c optional hwpmc
dev/hwpmc/hwpmc_cs.c optional hwpmc
dev/mbox/mbox_if.m optional soc_brcm_bcm2837 dev/mbox/mbox_if.m optional soc_brcm_bcm2837
dev/mmc/host/dwmmc.c optional dwmmc fdt dev/mmc/host/dwmmc.c optional dwmmc fdt
dev/mmc/host/dwmmc_hisi.c optional dwmmc fdt soc_hisi_hi6220 dev/mmc/host/dwmmc_hisi.c optional dwmmc fdt soc_hisi_hi6220
dev/mmc/host/dwmmc_rockchip.c optional dwmmc fdt soc_rockchip_rk3328 dev/mmc/host/dwmmc_rockchip.c optional dwmmc fdt soc_rockchip_rk3328
dev/neta/if_mvneta_fdt.c optional neta fdt dev/neta/if_mvneta_fdt.c optional neta fdt
dev/neta/if_mvneta.c optional neta mdio mii dev/neta/if_mvneta.c optional neta mdio mii
dev/ofw/ofw_cpu.c optional fdt dev/ofw/ofw_cpu.c optional fdt
dev/ofw/ofwpci.c optional fdt pci dev/ofw/ofwpci.c optional fdt pci
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sys/dev/hwpmc/hwpmc_arm64.c

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sys/dev/hwpmc/hwpmc_cs.h

  • This file was added.
/*-
* Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* This software was developed by BAE Systems, the University of Cambridge
* Computer Laboratory, and Memorial University under DARPA/AFRL contract
* FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
* (TC) research program.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _DEV_HWPMC_CS_H_
#define _DEV_HWPMC_CS_H_
#include <sys/types.h>
#include <sys/malloc.h>
#include <vm/vm.h>
#include <machine/frame.h>
#define CORESIGHT_NADDR 4
#define CORESIGHT_NPMCS 1
struct pmc_md_coresight_op_pmcallocate {
uint32_t flags;
uint64_t ranges[2 * CORESIGHT_NADDR];
int nranges;
};
#ifdef _KERNEL
struct coresight_buffer {
uint64_t phys_base;
vm_object_t obj;
};
/* MD extension for 'struct pmc' */
struct pmc_md_coresight_pmc {
struct coresight_buffer coresight_buffers[MAXCPU];
};
/*
* Prototypes.
*/
int pmc_coresight_initialize(struct pmc_mdep *_md, int _maxcpu);
void pmc_coresight_finalize(struct pmc_mdep *_md);
int pmc_coresight_intr(int cpu, struct trapframe *tf);
#endif /* !_KERNEL */
#endif /* !_DEV_HWPMC_CS_H_ */
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sys/dev/hwpmc/hwpmc_cs.c

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