Unlike the amd64 version upon which arm64's pmap_enter_largepage() was based, the arm64 version must always perform a TLB invalidation when updating a valid mapping, unless the change only alters the wired bit.
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| sys/arm64/arm64/pmap.c | ||
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| 5648 | Could you explain this line, please? | |
| sys/arm64/arm64/pmap.c | ||
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| 5664 | I think that we should consider removing the dsb(ishst) from the start of every pmap_invalidate_*() and make the caller responsible. This dsb would then no longer be conditional; it would be performed unconditionally before the if statement. A similar issue is going to come up in pmap_enter() when it too stops issuing TLB invalidations for wiring-only changes. | |
| sys/arm64/arm64/pmap.c | ||
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| 5648 | Confusing part is that newpte is incremented by L3_SIZE * L3C_ENTRIES, unless I mis-read the code. | |
| sys/arm64/arm64/pmap.c | ||
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| 5648 | origpte corresponds to the last L3 entry within the L3C superpage, so we only need to roll back newpte by one L3 page. I didn't think that a multiline comment was worth it here, but I'm willing to write one if you think it is necessary. | |
| sys/arm64/arm64/pmap.c | ||
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| 5648 | Might be just say that, Revert to the last L3 entry within the L3C superpage to detect wiring-only changes. | |