arm64: add feature bit definitions up to ARMv9.5
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Authored by harry.moulton_arm.com on Mar 5 2025, 10:29 AM.

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emaste

imp

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Reviewers

andrew
manu

Group Reviewers

arm64

Summary

Add missing feature bit definitions and additional feature ID registers
for ARMv9.0-9.5.

Sponsored by: Arm Ltd
Signed-off-by: Harry Moulton <harry.moulton@arm.com>

Diff Detail

Repository

rG FreeBSD src repository

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Unit

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Build Status

Buildable 62901
Build 59785: arc lint + arc unit

Event Timeline

harry.moulton_arm.com created this revision.Mar 5 2025, 10:29 AM

Herald added a reviewer: manu. · View Herald TranscriptMar 5 2025, 10:29 AM

Herald added subscribers: emaste, imp. · View Herald Transcript

harry.moulton_arm.com requested review of this revision.Mar 5 2025, 10:29 AM

Harbormaster completed remote builds in B62767: Diff 151908.Mar 5 2025, 10:29 AM

andrew added inline comments.Mar 12 2025, 2:28 PM

sys/arm64/arm64/identcpu.c
3647	Extra space at the start of the line?
sys/arm64/include/armreg.h
2273	The registers should be in alphanumeric order

Move ID_AA64SMFR0_EL1 definitions before ID_AA64ZFR0_EL1, and fix formatting in identcpu.c

Harbormaster completed remote builds in B62901: Diff 152212.Mar 13 2025, 10:15 AM

Revision Contents
Changeset List

Path

Size

sys/

arm64/

identcpu.c

390 lines

include/

armreg.h

352 lines

Diff 152212

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sys/arm64/arm64/identcpu.c