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Differential D47119

arm64: Support non-4 bit ID reg fields
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Authored by andrew on Oct 15 2024, 2:01 PM.
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arm64
Commits
rGaa760039c6eb: arm64: Support non-4 bit ID reg fields
Summary

In preparation for using the ID register decode with the cache type
register support a non-4 bit field width.

Sponsored by: Arm Ltd

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rG FreeBSD src repository
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Buildable 59999
Build 56884: arc lint + arc unit

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sys/
arm64/
arm64/
17 lines

Diff 144904

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sys/arm64/arm64/identcpu.c

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