Page MenuHomeFreeBSD
Differential D47119

arm64: Support non-4 bit ID reg fields
ClosedPublic
Actions

Authored by andrew on Oct 15 2024, 2:01 PM.
Tags
None
Referenced Files
F168802867: D47119.diff
Sun, Aug 30, 5:55 AM
F168683657: D47119.id144904.diff
Sat, Aug 29, 2:58 PM
Unknown Object (File)
Sat, Aug 29, 1:36 AM
Unknown Object (File)
Fri, Aug 28, 8:51 PM
Unknown Object (File)
Fri, Aug 28, 6:08 AM
Unknown Object (File)
Thu, Aug 27, 3:05 PM
Unknown Object (File)
Wed, Aug 26, 5:27 AM
Unknown Object (File)
Tue, Aug 25, 10:10 PM
View All Files
Subscribers
emaste
imp

Details

Reviewers
manu
imp
Group Reviewers
arm64
Commits
rGaa760039c6eb: arm64: Support non-4 bit ID reg fields
Summary

In preparation for using the ID register decode with the cache type
register support a non-4 bit field width.

Sponsored by: Arm Ltd

Diff Detail

Repository
rG FreeBSD src repository
Lint
Lint Not Applicable
Unit
Tests Not Applicable

Revision Contents
Changeset List

PathSize
sys/
arm64/
arm64/
17 lines

Diff 145253

View Options

sys/arm64/arm64/identcpu.c

Loading...