It does a Read-Modify-Write operation using clear and set bitmasks on
PCI Express Capability Register at pos. As certain PCI Express
Capability Registers are accessed concurrently in RMW fashion, hence
require locking which is handled transparently to the caller.
Sponsored by: Serenity CyberSecurity, LLC
MFC after: 1 week
MFC TODO: Move pcie_cap_lock to bottom to preserve KBI compatibility