Differential D36919

amd64 pmap: two trivial changes
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Authored by kib on Oct 10 2022, 12:40 AM.

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alc
markj

Commits

rG273d0715f6b1: amd64: remove useless addr2 variables in page range invalidation handlers
rGe0612ed490c7: amd64 pmap: add comment explaining why INVLPG is functional for PCID config

Summary

add comment explaining why INVLPG is functional for PCID config

remove useless addr2 variables in page range invalidation handlers

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Repository

rG FreeBSD src repository

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Event Timeline

kib created this revision.Oct 10 2022, 12:40 AM

Herald added a subscriber: imp. · View Herald TranscriptOct 10 2022, 12:40 AM

kib requested review of this revision.Oct 10 2022, 12:40 AM

markj accepted this revision.Oct 10 2022, 1:51 PM

This revision is now accepted and ready to land.Oct 10 2022, 1:51 PM

alc added inline comments.Oct 10 2022, 4:33 PM

sys/amd64/amd64/pmap.c
2909–2913	I would suggest: "When PCID is enabled, the INVLPG instruction invalidates all TLB entries for the given page that either match the current PCID or are global. Since TLB entries for the same page under different PCIDs are unaffected, kernel pages which reside in all address spaces could be problematic. We avoid ...

Alan' wording

This revision now requires review to proceed.Oct 10 2022, 8:42 PM

alc accepted this revision.Oct 10 2022, 9:30 PM

This revision is now accepted and ready to land.Oct 10 2022, 9:30 PM

Closed by commit rG273d0715f6b1: amd64: remove useless addr2 variables in page range invalidation handlers (authored by kib). · Explain WhyOct 10 2022, 9:34 PM

This revision was automatically updated to reflect the committed changes.

kib added a commit: rG273d0715f6b1: amd64: remove useless addr2 variables in page range invalidation handlers.

kib added a commit: rGe0612ed490c7: amd64 pmap: add comment explaining why INVLPG is functional for PCID config.

Revision Contents
Changeset List

Path

Size

sys/

amd64/

amd64/

19 lines

12 lines

Diff 111619

sys/amd64/amd64/mp_machdep.c

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sys/amd64/amd64/pmap.c

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