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Configure interrupt based on FDT type code on ARM64
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Authored by mst_semihalf.com on Apr 27 2016, 4:40 PM.
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zbb
wma
andrew
Summary

OFW_BUS_MAP_INTR should parse the IRQ type code and configure the interrupt trigger and polarity accordingly. The code is stored in per-interrupt struct.
If root PIC is not yet available then the code will be translated later in BUS_SETUP_INTR or arm_enable_intr, before the interrupt is configured.
Do not overwrite trigger and polarity if they were configured earlier e.g. by BUS_CONFIG_INTR interface.
This change was based on PowerPC nexus code.

Allow for more than 3 interrupt cells as specified in GICv3 DT bindings.

In addition, check the return value of PIC_CONFIG and print message or return error to the caller.

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rS FreeBSD src repository - subversion
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