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aq(4): correct Atlantic 2 register access
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Authored by nick_spun.io on Fri, Jul 10, 3:56 AM.
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Details

Reviewers
adrian
Summary

Four Atlantic 2 register-access corrections found in bring-up.

B0 aggregate octet counters: the B0 firmware statistics interface reports
only aggregate rx/tx good octets, not the per-cast breakdown A0 and
Atlantic 1 provide, so every octet sysctl read a permanent zero while
frame counters advanced. Populate the aggregate octet fields from the B0
buffer; aq_update_hw_stats() accumulates them directly when the per-cast
octets are absent.

Drop the duplicate attach-time MCP reboot: aq_hw_mpi_create() already
reboots the A2 firmware to read its version and caps, then aq_hw_reset()
immediately rebooted it again -- a full MCP restart plus several
transaction-id-bracketed window reads, adding attach latency and a
duplicate banner. Give aq_hw_reset() a reboot flag and pass reboot=false
for A2 at attach; the load-bearing down/stop reboot (which resyncs A2 RX
DMA across ifconfig down/up) keeps reboot=true.

Skip Atlantic 1 register accesses on Atlantic 2: gate out the 0x7040
Atlantic 1 TPO write (which A2 lacks; already a no-op via the unset TPO2
feature, but Linux hw_atl2 omits it), and guard the
aq_hw_mpi_read_stats() direct reads of reg_rx_dma_stat_counter7 (dpc) and
the LRO counter (cprc) with !ATLANTIC2 -- those are Atlantic 1 codegen
offsets that on Atlantic 2 land on unrelated registers and can report
bogus input-drop / LRO counts.

HW-validated on AQC107 <-> AQC113C: A1 stats unchanged, A2 IQDROPS stays
0, attach consumes one MCP reboot instead of two, bidirectional iperf3
clean.

Diff Detail

Repository
rG FreeBSD src repository
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Buildable 74792
Build 71675: arc lint + arc unit