ixl(4): Fix errors in queue interrupt setup in MSIX mode.
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Authored by erj on Feb 5 2016, 11:00 PM.

Details

Reviewers

jeffrey.e.pieper_intel.com
gnn
sbruno
adrian

Group Reviewers

Intel Networking

Commits

rS295829: ixl(4): Fix errors in queue interrupt setup in MSIX mode.

Summary

One of the registers should be cleared instead of writing
the queue index to it, and the queue linked list for each
vector should only include the queue pair's Rx and Tx queues,
not every single other queue's Tx and Rx pairs.

Diff Detail

Repository

rS FreeBSD src repository - subversion

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Unit

No Test Coverage

Build Status

Buildable 2405
Build 2421: arc lint + arc unit

Event Timeline

erj updated this revision to Diff 13072.Feb 5 2016, 11:00 PM

erj retitled this revision from to ixl(4): Fix errors in queue interrupt setup in MSIX mode..

erj updated this object.

Herald added a reviewer: Intel Networking. · View Herald TranscriptFeb 5 2016, 11:00 PM

Herald added a subscriber: imp. · View Herald Transcript

erj added reviewers: adrian, gnn, jeffrey.e.pieper_intel.com.Feb 5 2016, 11:00 PM

sbruno accepted this revision.Feb 8 2016, 4:34 PM

sbruno added a reviewer: sbruno.

This revision is now accepted and ready to land.Feb 8 2016, 4:34 PM

Tested with MSIX queues ranging from 8 to 72.

Closed by commit rS295829: ixl(4): Fix errors in queue interrupt setup in MSIX mode. (authored by erj). · Explain WhyFeb 19 2016, 10:45 PM

This revision was automatically updated to reflect the committed changes.

Revision Contents
Changeset List

Path

Size

sys/

dev/

ixl/

if_ixl.c

8 lines

Diff 13072

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ixl(4): Fix errors in queue interrupt setup in MSIX mode.ClosedPublicActions