One of the registers should be cleared instead of writing
the queue index to it, and the queue linked list for each
vector should only include the queue pair's Rx and Tx queues,
not every single other queue's Tx and Rx pairs.
Details
Details
- Reviewers
jeffrey.e.pieper_intel.com gnn sbruno adrian - Group Reviewers
Intel Networking - Commits
- rS295829: ixl(4): Fix errors in queue interrupt setup in MSIX mode.
Diff Detail
Diff Detail
- Repository
- rS FreeBSD src repository - subversion
- Lint
Lint Not Applicable - Unit
Tests Not Applicable