hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit
ClosedPublic
Actions

Authored by andrew on May 20 2025, 10:42 AM.

Tags

None

Referenced Files

	F154926793: D50431.id156183.diff
	Thu, Apr 30, 2:47 AM

	Unknown Object (File)
	Thu, Apr 23, 11:31 AM

	Unknown Object (File)
	Thu, Apr 23, 12:47 AM

	Unknown Object (File)
	Wed, Apr 22, 9:23 AM

	Unknown Object (File)
	Mon, Apr 20, 9:01 AM

	Unknown Object (File)
	Mon, Apr 20, 6:06 AM

	Unknown Object (File)
	Sun, Apr 19, 8:26 AM

	Unknown Object (File)
	Sat, Apr 18, 8:54 PM

View All 79 Files

Subscribers

emaste

imp

Details

Reviewers

gnn

Group Reviewers

arm64
pmc

Commits

rG48d41181ee1d: hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit

Summary

It may return data in the upper 32-bits when FEAT_PMUv3p5 is
implemented so mask those bits off.

Diff Detail

Repository

rG FreeBSD src repository

Lint

Lint Not Applicable

Unit

Tests Not Applicable

Event Timeline

andrew created this revision.May 20 2025, 10:42 AM

Herald added a reviewer: gnn. · View Herald TranscriptMay 20 2025, 10:42 AM

Herald added subscribers: emaste, imp. · View Herald Transcript

andrew requested review of this revision.May 20 2025, 10:42 AM

Harbormaster completed remote builds in B64311: Diff 155740.May 20 2025, 10:42 AM

andrew added a parent revision: D50430: arm64: Add more PMCR_EL0 fields.May 20 2025, 10:42 AM

andrew added a child revision: D50432: hwpmc/arm64: The counter is 64-bit.

This revision was not accepted when it landed; it landed in state Needs Review.May 28 2025, 1:35 PM

Closed by commit rG48d41181ee1d: hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit (authored by andrew). · Explain Why

This revision was automatically updated to reflect the committed changes.

andrew added a commit: rG48d41181ee1d: hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bit.

Revision Contents
Changeset List

Path

Size

sys/

dev/

hwpmc/

hwpmc_arm64.c

6 lines

Diff 156183

View Options

sys/dev/hwpmc/hwpmc_arm64.c

hwpmc/arm64: The PMXEVCNTR_EL0 register is 64-bitClosedPublicActions