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Differential D34444

x86: Defer TSC timecounter calibration
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Authored by markj on Mar 4 2022, 6:27 PM.
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rG075e2779aca7: x86: Defer early TSC timecounter calibration to SI_SUB_CPU
Summary

If we can't determine the TSC frequency using CPU registers, we need to
give a chance for hyperv to register a timecounter since an emulated
8254 might not be available.

Fixes: 84369dd52369 ("x86: Probe the TSC frequency earlier")
Reported by: khng, Shawn Webb

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rG FreeBSD src repository
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Event Timeline

markj created this revision.Mar 4 2022, 6:27 PM
Herald added a subscriber: imp. · View Herald TranscriptMar 4 2022, 6:27 PM
markj requested review of this revision.Mar 4 2022, 6:27 PM
Harbormaster completed remote builds in B44659: Diff 103498.Mar 4 2022, 6:27 PM
emaste added a subscriber: emaste.Mar 4 2022, 6:35 PM
khng accepted this revision.Mar 4 2022, 6:41 PM
khng mentioned this in D34441: amd64: Call clock_init() after finishidentcpu().
khng added a subscriber: khng.

Works on the 10.0.20348.524 Hyper-V hypervisor, with AMD Epyc 7443 CPU.

This revision is now accepted and ready to land.Mar 4 2022, 6:42 PM
rpokala added a subscriber: rpokala.Mar 4 2022, 7:05 PM
rpokala added inline comments.
sys/x86/x86/tsc.c
269

"a chance to a"

I think you're missing a verb...?

markj updated this revision to Diff 103502.Mar 4 2022, 7:08 PM
markj marked an inline comment as done.

Fix a typo.

This revision now requires review to proceed.Mar 4 2022, 7:08 PM
Harbormaster completed remote builds in B44660: Diff 103502.Mar 4 2022, 7:08 PM
khng accepted this revision.Mar 4 2022, 8:50 PM
This revision is now accepted and ready to land.Mar 4 2022, 8:50 PM
Closed by commit rG075e2779aca7: x86: Defer early TSC timecounter calibration to SI_SUB_CPU (authored by markj). · Explain WhyMar 5 2022, 12:50 AM
This revision was automatically updated to reflect the committed changes.
markj added a commit: rG075e2779aca7: x86: Defer early TSC timecounter calibration to SI_SUB_CPU.

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x86/
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sys/x86/x86/tsc.c

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