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x86: Defer TSC timecounter calibration
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Authored by markj on Mar 4 2022, 6:27 PM.
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Details

Summary

If we can't determine the TSC frequency using CPU registers, we need to
give a chance for hyperv to register a timecounter since an emulated
8254 might not be available.

Fixes: 84369dd52369 ("x86: Probe the TSC frequency earlier")
Reported by: khng, Shawn Webb

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rG FreeBSD src repository
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Event Timeline

markj requested review of this revision.Mar 4 2022, 6:27 PM
khng added a subscriber: khng.

Works on the 10.0.20348.524 Hyper-V hypervisor, with AMD Epyc 7443 CPU.

This revision is now accepted and ready to land.Mar 4 2022, 6:42 PM
rpokala added inline comments.
sys/x86/x86/tsc.c
269

"a chance to a"

I think you're missing a verb...?

markj marked an inline comment as done.

Fix a typo.

This revision now requires review to proceed.Mar 4 2022, 7:08 PM
This revision is now accepted and ready to land.Mar 4 2022, 8:50 PM