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ipq4018: add SoC reset, SMP, reset syscon and qcom_rnd driver
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Authored by adrian on Oct 29 2021, 3:17 AM.
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Details

Summary
  • MVP for doing an SoC reset
  • A simple qcom_rnd random entropy driver
  • A simple SCM implementation for doing SMC calls into the QCOM TZ firmware, enough for this chipset to set the cold boot address for MP
  • Bring the MPs up and out of reset to start SMP
  • The reset controller side of the gcc (clock + reset) hardware block

The registers and reset index -> register/bit came from Linux; I reimplemented all the code and comments myself.

Test Plan
  • ASUS RT-AC58U router, IPQ4019

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Lint Passed
Unit
No Test Coverage
Build Status
Buildable 42469
Build 39357: arc lint + arc unit

Event Timeline

  • qcom: add initial SCM legacy API
  • ipq401x: add MP core start-up path for the CPU regulator/clock gate used
  • ipq401x: flip on SMP for the ASUS AC1300
emaste added inline comments.
sys/arm/conf/ASUS_AC1300
40–41

still true?

  • ipq401x: flip on SMP for the ASUS AC1300
  • qcom: add initial SCM legacy API
  • ipq401x: add MP core start-up path for the CPU regulator/clock gate used
  • ipq401x: flip on SMP for the ASUS AC1300
  • qcom: add initial SCM legacy API
  • ipq401x: add MP core start-up path for the CPU regulator/clock gate used
  • ipq401x: flip on SMP for the ASUS AC1300
  • ipq4018: add initial reset driver support for the clock/reset controller.
  • ipq4018: add qcom-gcc-ipq4018 and dependencies into the build
  • ipq4018: add initial reset driver support for the clock/reset controller.
  • ipq4018: add qcom-gcc-ipq4018 and dependencies into the build
adrian retitled this revision from ipq4018: add SoC reset and qcom_rnd driver to ipq4018: add SoC reset, SMP, reset syscon and qcom_rnd driver.Oct 31 2021, 6:00 AM
adrian edited the summary of this revision. (Show Details)
adrian edited the summary of this revision. (Show Details)
sys/arm/qualcomm/qcom_gcc_ipq4018.c
150 ↗(On Diff #97765)

is this the right api for fdt reset resources? or something else?

sys/arm/qualcomm/qcom_scm_legacy_defs.h
88

hey i left myself a comment to address before landing!

manu added inline comments.
sys/arm/qualcomm/qcom_cpu_kpssv2.c
104

No need for those checks as you check below that the properties exists and are correct.

sys/arm/qualcomm/qcom_gcc_ipq4018.c
90 ↗(On Diff #97765)

style(9) no {} for singe if clause.

94 ↗(On Diff #97765)

Same

150 ↗(On Diff #97765)

yep it's the correct one.

sys/arm/qualcomm/qcom_cpu_kpssv2.c
32

If you're not planning on an MFC to stable/12 you can drop this in new files.

60–61

DELAY should work from just before the platform_attach function is called.

sys/arm/qualcomm/qcom_gcc_ipq4018.c
90 ↗(On Diff #97765)

It was changed to allow them in R10:abb14e5deda396bc3fb070ec80cb8a6ced66dd87

163–165 ↗(On Diff #97765)

Do you need to pass qcom_gcc_ipq4018_modevent here? Other drivers use 0.

adrian added inline comments.
sys/arm/qualcomm/qcom_cpu_kpssv2.c
60–61

it doesn't, I've tried. We should totally try to fix it in a different commit stack. :)

sys/arm/qualcomm/qcom_gcc_ipq4018.c
163–165 ↗(On Diff #97765)

I'm .. not sure if I want to support unloading the driver later on. I'll delete the mod deletion stuff later on from these drivers if I decide that it's not worth it.

  • qcom: add initial SCM legacy API
  • ipq401x: add MP core start-up path for the CPU regulator/clock gate used
  • ipq401x: flip on SMP for the ASUS AC1300
  • ipq4018: add initial reset driver support for the clock/reset controller.
  • ipq4018: add qcom-gcc-ipq4018 and dependencies into the build
  • ipq4018: add qcom-gcc-ipq4018 and dependencies into the build