Add an instruction barrier to pmap_activate()

[alc]

Summary

According to Section D5.10.3 "Maintenance requirements on changing System register values" of the architecture manual, an isb instruction should be executed after updating ttbr0_el1 and before invalidating the TLB.

Test Plan

After adding the isb instruction into pmap_activate(), I can replace the pmap_invalidate_page() in pmap_enter_quick_locked() with a dsb ishst instruction and not suffer from spurious bus errors.

[markj]

efi_arch_enter() and _leave() have the isb following the TLB invalidation.

Perhaps we should add a cpufunc.h intrinsic for these two instructions?

[alc]

Add the isb instruction to efi_arch_enter() and efi_arch_leave().

[alc]

In D20904#453005, @markj wrote:

efi_arch_enter() and _leave() have the isb following the TLB invalidation.

I believe that the isb instruction must be executed before and after TLB invalidation.

Perhaps we should add a cpufunc.h intrinsic for these two instructions?

Probably.