In pti-enabled pmap, the PCID allocation scheme assigns temporal id for the kernel page table, and user page table twin PCID is calculating by setting high bit in the kernel PCID. So the kernel AS is mapped with per-vmspace PCID, and we must completely shut down all mappings in KVA when switching contexts, so that newly switched thread would see all changes in KVA occured while it was not executing. After all, KVA is same between all threads.
I coded the pti context switch so that user part of the page table gets its TLB entries flushed too. Now I think it is excessive. The same PCID flushing algorithm that is used for non-pti pmap, seems to correctly work for the UVA mappings. The only shared TLB entries are the pages from KVA accessed by the kernel entry trampoline. All of them are static except per-thread TSS and LDT. For TSS and LDT, the lifetime of newly allocated entries is the whole thread life, so it should be fine as well. If not fine, then explicit shutdowns for current pmap of the newly allocated LDT and TSS pages would be enough.