aw_ccung: changes to accommodate upcoming a83t support

[kevans]

Summary

Add a means to specify mask/value for the prediv condition instead of shift/width/value for clocks that have a more complex mux scenario.

Specifically, ahb1 on the a83t has the prediv applied if mux is either b10 or b11.

[kevans]

Add missing ccu_r changes

[kevans]

Remove the ccu_r modification

[manu]

sys/arm/allwinner/clkng/aw_ccung.c

70 ↗

(On Diff #34537)

This review don't contain the A83T code so don't include it yet.

99 ↗

(On Diff #34537)

This review don't contain the A83T code so don't include it yet.

344 ↗

(On Diff #34537)

This review don't contain the A83T code so don't include it yet.

sys/arm/allwinner/clkng/aw_ccung.h

54 ↗

(On Diff #34537)

This is not needed to move the defines (for now).

[kevans]

I'll get it right one of these days. =)

[manu]

I think that the cpupll can be added just by using the N factor (so a simple mult clock), the P factor is used when the output is less than 288 Mhz.
From a comment in the linux source tree : "Neither mainline Linux, U-boot, nor the vendor BSPs use these."
We don't have clk_mult in extres and I think it's worth adding it.

For AHB1 just list the parent twice, it's already done that way for APB2 on A31 for example.

[kevans]

In D12851#269166, @manu wrote:

I think that the cpupll can be added just by using the N factor (so a simple mult clock), the P factor is used when the output is less than 288 Mhz.
From a comment in the linux source tree : "Neither mainline Linux, U-boot, nor the vendor BSPs use these."
We don't have clk_mult in extres and I think it's worth adding it.

Should I go ahead and write a clk_mult, or would it suffice for these purposes to go ahead and model these two clocks as an NM clk with a fixed M?

[manu]

In D12851#269608, @kevans wrote:

In D12851#269166, @manu wrote:

I think that the cpupll can be added just by using the N factor (so a simple mult clock), the P factor is used when the output is less than 288 Mhz.
From a comment in the linux source tree : "Neither mainline Linux, U-boot, nor the vendor BSPs use these."
We don't have clk_mult in extres and I think it's worth adding it.

Should I go ahead and write a clk_mult, or would it suffice for these purposes to go ahead and model these two clocks as an NM clk with a fixed M?

Just use NM clock, I use fake factor for every other SoCs, no reason that you cannot do it too :)

[manu]

And as said on IRC, for bit cond just rewrite the logic with shift/mask (if shift is 0, use mask directly instead of computing it etc ...). That should solve all your problems for those new clocks.

[kevans]

Something like this, perhaps? Use looks like this:

PREDIV_CLK_WITH_MASK(ahb1_clk,
     CLK_AHB1,                                  /* id */
     "ahb1", ahb1_parents,                      /* name, parents */
     0x54,                                      /* offset */
     12, 2,                                     /* mux */
     4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO,       /* div */
     6, 2, 0, AW_CLK_FACTOR_HAS_COND,           /* prediv */
     (2 << 12), (2 << 12));                     /* prediv condition */

[kevans]

Correct condition

[manu]

This looks good now (except the description which isn't accurate anymore).

[kevans]

Ping @emaste; this one is a prerequisite to ccung for a83t going in.

[emaste]

I approve based on @manu's review