(WIP) Allwinner a83t: add ccung bits
ClosedPublic
Actions

Authored by kevans on Oct 31 2017, 2:39 AM.

Details

Reviewers

manu
jmcneill
emaste

Commits

rS326114: Allwinner a83t: add ccung bits

Summary

AW_CLK_FACTOR_POWER_OF_FOUR was added to simplify two factors of NKMP clocks
that had /1 and /4 divisors, and AW_CLK_FACTOR_HAS_BIT_COND to support ahb1 that apparently
supports both b10 and b11 as meaning PLL_PERIPH/prediv.

ccu-r was amended because the A83t uses the same clocks but names them differently, and
faking it seemed like not such a good idea.

I think I still need to go back through and do a little bit of style(9) cleanup.

This also obviously needs to wait until Linux 4.14 dts gets imported, as my testing is based
off of an updated upstream. I've included those changes and the relevant update here purely for
the sake of review/testing.

Diff Detail

Repository

rS FreeBSD src repository - subversion

Lint

Lint Not Applicable

Unit

Tests Not Applicable

Event Timeline

kevans created this revision.Oct 31 2017, 2:39 AM

Herald added a subscriber: andrew. · View Herald TranscriptOct 31 2017, 2:39 AM

Harbormaster completed remote builds in B12320: Diff 34482.Oct 31 2017, 2:39 AM

At first glance this looks ok.
Could you break this review down to two review ?
One for the generic clock changes (I need to have a better look at it).
One for the A83T ccu support (Again need to really look at it with the datasheet in front of me).

You can commit the mmc change with my reviewed-by.
You can skip the dts changes for now.

Thanks !

jmcneill added inline comments.Oct 31 2017, 10:23 AM

sys/arm/allwinner/a10_mmc.c
68 ↗	(On Diff #34482)	Have you looked at adding support for `allwinner,sun8i-a83t-emmc`? It's pretty straight-forward. The SDMMC2 clock has an extra "new timings mode" register that you need to deal with (depending on the setting, the output of that clock may be /2). How I dealt with this on NetBSD was to enable "new timings mode" in the CCU driver's init function and flagged the SDMMC2 clock as being /2, then for this compat string I make sure to set the mode select bit in the NTSR reg when updating clocks.

kevans added inline comments.Oct 31 2017, 2:55 PM

sys/arm/allwinner/a10_mmc.c
68 ↗	(On Diff #34482)	Oh, cool, I had not. I'll work on that after getting this CCU stuff right (and in-tree)... it sounds straight-forward enough.
sys/conf/files.arm64
45 ↗	(On Diff #34482)	Not sure how this slipped in- it'll go away.

Reduce to just ccu_a83t

kevans added a parent revision: D12851: aw_ccung: changes to accommodate upcoming a83t support.Oct 31 2017, 5:14 PM

Re-model the cpux PLLs as NM clks, ignoring the 'p' factor because it's apparently left untouched by both u-boot and linux.
Use new feature for ahb1 to use ordinary AW_CLK_FACTOR_HAS_COND support, but passes mask directly rather than letting the div mux stuff calculate it.
Fix missing ZERO_BASED in one of the cpux PLLs; this also caused us to read it and all of its children 3x higher than actual values.

Herald added a subscriber: imp. · View Herald TranscriptNov 10 2017, 3:00 AM

This looks ok, just need to add it in sys/arm/allwinner/a83t/files.a83t and we're good.