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Fix MPIC mask/unmask
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Authored by mw_semihalf.com on May 14 2017, 12:50 AM.

Details

Summary

Before the fix for single interrupt, both percpu and non-percpu routes
were enabled/disable at the same time.

Diff Detail

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rS FreeBSD src repository
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Event Timeline

andrew added inline comments.May 14 2017, 8:28 AM
sys/arm/mv/mpic.c
154 ↗(On Diff #28316)

ARM_INTRNG doesn't exist.

sys/arm/mv/mpic.c
154 ↗(On Diff #28316)

Sure, next patch is reverting this change (https://reviews.freebsd.org/D10717). I'll correct this in second version.

mw_semihalf.com marked an inline comment as done.
loos accepted this revision.May 17 2017, 10:15 PM

Sorry, you will need to rebase this patch after r318426, on the other hand the changes were tested and built in -head.

Index: sys/arm/mv/mpic.c
===================================================================
--- sys/arm/mv/mpic.c   (revision 318428)
+++ sys/arm/mv/mpic.c   (working copy)
@@ -152,6 +152,7 @@
 static int     mpic_intr(void *arg);
 #endif
 static void    mpic_unmask_msi(void);
+static boolean_t mpic_irq_is_percpu(uintptr_t);

 #define        MPIC_WRITE(softc, reg, val) \
     bus_space_write_4((softc)->mpic_bst, (softc)->mpic_bsh, (reg), (val))
@@ -474,13 +475,24 @@
        MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ERR_MASK, mask);
 }

+static boolean_t
+mpic_irq_is_percpu(uintptr_t nb)
+{
+       if (nb < MPIC_PPI)
+               return TRUE;
+
+       return FALSE;
+}
+
 static void
 mpic_unmask_irq(uintptr_t nb)
 {

        if (nb < ERR_IRQ) {
-               MPIC_WRITE(mv_mpic_sc, MPIC_ISE, nb);
-               MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ICM, nb);
+               if (!mpic_irq_is_percpu(nb))
+                       MPIC_WRITE(mv_mpic_sc, MPIC_ISE, nb);
+               else
+                       MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ICM, nb);
        } else if (nb < MSI_IRQ)
                mpic_unmask_irq_err(nb);

@@ -493,8 +505,10 @@
 {

        if (nb < ERR_IRQ) {
-               MPIC_WRITE(mv_mpic_sc, MPIC_ICE, nb);
-               MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ISM, nb);
+               if (!mpic_irq_is_percpu(nb))
+                       MPIC_WRITE(mv_mpic_sc, MPIC_ICE, nb);
+               else
+                       MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ISM, nb);
        } else if (nb < MSI_IRQ)
                mpic_mask_irq_err(nb);
 }
This revision is now accepted and ready to land.May 17 2017, 10:15 PM

Thanks, I've just prepared a patch rebased against your change - it has slightly improved if statements. Verified with the network traffic.

mw_semihalf.com edited edge metadata.
This revision now requires review to proceed.May 17 2017, 10:49 PM
loos accepted this revision.May 19 2017, 4:44 AM

That's it! I knew I had missed something. Thanks!

This revision is now accepted and ready to land.May 19 2017, 4:44 AM
This revision was automatically updated to reflect the committed changes.