Added SOC_NXP_LS1046A dependency.

I modified the driver to use the modified QorIQ clockgen classes.
Also added dependency on SOC_NXP_LS104A.

Pretty much a total rewrite. Now more closely represents the clock
node structure. For PLL nodes separate classes are now used, but
the PLL registers are read only, so there is no write functionality.
Other than that multiplexers are now represented by built-in classes
and PLL dividers are represented by fixed factor clocks.

Thanks for the comments, in the coming days I'll prepare v2 of this diff.