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Differential D22281

Cleanup Rockchip clocks implementation.
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Authored by mmel on Nov 8 2019, 5:14 PM.
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andrew
emaste
imp

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Reviewers
manu
Group Reviewers
arm64
Commits
rS358644: MFC r354554-r354558, r355115
rS354555: Cleanup Rockchip clocks implementation.
Summary
  • style
  • unify dprinf defines
  • make dprinf's 32-bit compatible

Not a functional change.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Unit
Tests Not Applicable

Event Timeline

mmel created this revision.Nov 8 2019, 5:14 PM
Herald added subscribers: emaste, andrew, imp. · View Herald TranscriptNov 8 2019, 5:14 PM
manu accepted this revision.Nov 8 2019, 5:43 PM
This revision is now accepted and ready to land.Nov 8 2019, 5:43 PM
imp added inline comments.Nov 8 2019, 5:54 PM
sys/arm64/rockchip/clk/rk_clk_armclk.c
77 ↗(On Diff #64079)

maybe have a rockport option for this rather than #if 0

139 ↗(On Diff #64079)

Since j is uintmax_t, do you need a cast here, and points below?

mmel added inline comments.Nov 8 2019, 6:11 PM
sys/arm64/rockchip/clk/rk_clk_armclk.c
77 ↗(On Diff #64079)

this is for easy enabling of debug printfs for developer , file by file, clock by clock. I don't think that this can be used by 'normal' user.

139 ↗(On Diff #64079)

imo, this is safe area for arm32 long long int and for arm64 long int.
I agree that right way is cast to uintmax_t, but we talking about debug only code and line length is also important. (this mean that i prefer proposed code but i have no strict objection to add uintmax_t cast, even if this breaks code readability a bit..

Closed by commit rS354555: Cleanup Rockchip clocks implementation. (authored by mmel). · Explain WhyNov 8 2019, 7:03 PM
This revision was automatically updated to reflect the committed changes.
mmel added a commit: rS354555: Cleanup Rockchip clocks implementation..
manu added a commit: rS358644: MFC r354554-r354558, r355115.Mar 4 2020, 9:01 PM

Revision Contents
Changeset List

PathSize
head/
sys/
arm64/
rockchip/
clk/
21 lines
23 lines
2 lines
2 lines
35 lines
9 lines

Diff 64085

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head/sys/arm64/rockchip/clk/rk_clk_armclk.c

Show All 29 Lines
#include <sys/param.h> #include <sys/param.h>
#include <sys/systm.h> #include <sys/systm.h>
#include <sys/bus.h> #include <sys/bus.h>
#include <sys/condvar.h> #include <sys/condvar.h>
#include <sys/kernel.h> #include <sys/kernel.h>
#include <sys/lock.h> #include <sys/lock.h>
#include <sys/module.h> #include <sys/module.h>
#include <sys/mutex.h> #include <sys/mutex.h>
#include <sys/sbuf.h>
#include <sys/socket.h> #include <sys/socket.h>
#include <sys/sysctl.h> #include <sys/sysctl.h>
#include <sys/unistd.h> #include <sys/unistd.h>
#include <net/if.h> #include <net/if.h>
#include <net/if_var.h> #include <net/if_var.h>
#include <net/if_media.h> #include <net/if_media.h>
/* needed for checksum offload */
#include <netinet/in.h>
#include <netinet/ip.h>
#include <dev/mii/mii.h> #include <dev/mii/mii.h>
#include <dev/mii/miivar.h> #include <dev/mii/miivar.h>
#include <dev/usb/usb.h> #include <dev/usb/usb.h>
#include <dev/usb/usbdi.h> #include <dev/usb/usbdi.h>
#include <dev/usb/usbdi_util.h> #include <dev/usb/usbdi_util.h>
#include "usbdevs.h" #include "usbdevs.h"
#define USB_DEBUG_VAR ure_debug #define USB_DEBUG_VAR ure_debug
#include <dev/usb/usb_debug.h> #include <dev/usb/usb_debug.h>
#include <dev/usb/usb_process.h> #include <dev/usb/usb_process.h>
#include <dev/usb/net/usb_ethernet.h> #include <dev/usb/net/usb_ethernet.h>
#include <dev/usb/net/if_urereg.h> #include <dev/usb/net/if_urereg.h>
#include "miibus_if.h" #include "miibus_if.h"
#include "opt_inet6.h"
#ifdef USB_DEBUG #ifdef USB_DEBUG
static int ure_debug = 0; static int ure_debug = 0;
static SYSCTL_NODE(_hw_usb, OID_AUTO, ure, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, static SYSCTL_NODE(_hw_usb, OID_AUTO, ure, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
"USB ure"); "USB ure");
SYSCTL_INT(_hw_usb_ure, OID_AUTO, debug, CTLFLAG_RWTUN, &ure_debug, 0, SYSCTL_INT(_hw_usb_ure, OID_AUTO, debug, CTLFLAG_RWTUN, &ure_debug, 0,
"Debug level"); "Debug level");
#endif #endif
#ifdef USB_DEBUG_VAR
#ifdef USB_DEBUG
#define DEVPRINTFN(n,dev,fmt,...) do { \
if ((USB_DEBUG_VAR) >= (n)) { \
device_printf((dev), "%s: " fmt, \
__FUNCTION__ ,##__VA_ARGS__); \
} \
} while (0)
#define DEVPRINTF(...) DEVPRINTFN(1, __VA_ARGS__)
#else
#define DEVPRINTF(...) do { } while (0)
#define DEVPRINTFN(...) do { } while (0)
#endif
#endif
/* /*
* Various supported device vendors/products. * Various supported device vendors/products.
*/ */
static const STRUCT_USB_HOST_ID ure_devs[] = { static const STRUCT_USB_HOST_ID ure_devs[] = {
#define URE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } #define URE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
URE_DEV(LENOVO, RTL8153, 0), URE_DEV(LENOVO, RTL8153, 0),
URE_DEV(LENOVO, TBT3LAN, 0), URE_DEV(LENOVO, TBT3LAN, 0),
URE_DEV(LENOVO, ONELINK, 0), URE_DEV(LENOVO, ONELINK, 0),
Show All 33 Lines
static uint16_t ure_read_2(struct ure_softc *, uint16_t, uint16_t); static uint16_t ure_read_2(struct ure_softc *, uint16_t, uint16_t);
static uint32_t ure_read_4(struct ure_softc *, uint16_t, uint16_t); static uint32_t ure_read_4(struct ure_softc *, uint16_t, uint16_t);
static int ure_write_1(struct ure_softc *, uint16_t, uint16_t, uint32_t); static int ure_write_1(struct ure_softc *, uint16_t, uint16_t, uint32_t);
static int ure_write_2(struct ure_softc *, uint16_t, uint16_t, uint32_t); static int ure_write_2(struct ure_softc *, uint16_t, uint16_t, uint32_t);
static int ure_write_4(struct ure_softc *, uint16_t, uint16_t, uint32_t); static int ure_write_4(struct ure_softc *, uint16_t, uint16_t, uint32_t);
static uint16_t ure_ocp_reg_read(struct ure_softc *, uint16_t); static uint16_t ure_ocp_reg_read(struct ure_softc *, uint16_t);
static void ure_ocp_reg_write(struct ure_softc *, uint16_t, uint16_t); static void ure_ocp_reg_write(struct ure_softc *, uint16_t, uint16_t);
static int ure_sysctl_chipver(SYSCTL_HANDLER_ARGS);
static void ure_read_chipver(struct ure_softc *); static void ure_read_chipver(struct ure_softc *);
static int ure_attach_post_sub(struct usb_ether *); static int ure_attach_post_sub(struct usb_ether *);
static void ure_reset(struct ure_softc *); static void ure_reset(struct ure_softc *);
static int ure_ifmedia_upd(struct ifnet *); static int ure_ifmedia_upd(struct ifnet *);
static void ure_ifmedia_sts(struct ifnet *, struct ifmediareq *); static void ure_ifmedia_sts(struct ifnet *, struct ifmediareq *);
static int ure_ioctl(struct ifnet *, u_long, caddr_t); static int ure_ioctl(struct ifnet *, u_long, caddr_t);
static void ure_rtl8152_init(struct ure_softc *); static void ure_rtl8152_init(struct ure_softc *);
static void ure_rtl8153_init(struct ure_softc *); static void ure_rtl8153_init(struct ure_softc *);
static void ure_disable_teredo(struct ure_softc *); static void ure_disable_teredo(struct ure_softc *);
static void ure_init_fifo(struct ure_softc *); static void ure_init_fifo(struct ure_softc *);
static void ure_rxcsum(int capenb, struct ure_rxpkt *rp, struct mbuf *m);
static int ure_txcsum(struct mbuf *m, int caps, uint32_t *regout);
static const struct usb_config ure_config[URE_N_TRANSFER] = { static const struct usb_config ure_config_rx[URE_N_TRANSFER] = {
[URE_BULK_DT_WR] = { {
.type = UE_BULK, .type = UE_BULK,
.endpoint = UE_ADDR_ANY, .endpoint = UE_ADDR_ANY,
.direction = UE_DIR_OUT, .direction = UE_DIR_IN,
.bufsize = MCLBYTES, .bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
.callback = ure_bulk_write_callback, .callback = ure_bulk_read_callback,
.timeout = 10000, /* 10 seconds */ .timeout = 0, /* no timeout */
}, },
[URE_BULK_DT_RD] = { {
.type = UE_BULK, .type = UE_BULK,
.endpoint = UE_ADDR_ANY, .endpoint = UE_ADDR_ANY,
.direction = UE_DIR_IN, .direction = UE_DIR_IN,
.bufsize = 16384, .bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
.callback = ure_bulk_read_callback, .callback = ure_bulk_read_callback,
.timeout = 0, /* no timeout */ .timeout = 0, /* no timeout */
}, },
#if URE_N_TRANSFER == 4
{
.type = UE_BULK,
.endpoint = UE_ADDR_ANY,
.direction = UE_DIR_IN,
.bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
.callback = ure_bulk_read_callback,
.timeout = 0, /* no timeout */
},
{
.type = UE_BULK,
.endpoint = UE_ADDR_ANY,
.direction = UE_DIR_IN,
.bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
.callback = ure_bulk_read_callback,
.timeout = 0, /* no timeout */
},
#endif
}; };
static const struct usb_config ure_config_tx[URE_N_TRANSFER] = {
{
.type = UE_BULK,
.endpoint = UE_ADDR_ANY,
.direction = UE_DIR_OUT,
.bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
.callback = ure_bulk_write_callback,
.timeout = 10000, /* 10 seconds */
},
{
.type = UE_BULK,
.endpoint = UE_ADDR_ANY,
.direction = UE_DIR_OUT,
.bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
.callback = ure_bulk_write_callback,
.timeout = 10000, /* 10 seconds */
},
#if URE_N_TRANSFER == 4
hselaskyUnsubmitted
Done
Inline Actions
>= 4 like in previous statement?
hselasky: >= 4 like in previous statement?
jmgAuthorUnsubmitted
Done
Inline Actions

I converted the other one to ==. I had tried to see if 8 would work, but got failure when allocating memory.

jmg: I converted the other one to ==. I had tried to see if 8 would work, but got failure when…
{
.type = UE_BULK,
.endpoint = UE_ADDR_ANY,
.direction = UE_DIR_OUT,
.bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
.callback = ure_bulk_write_callback,
.timeout = 10000, /* 10 seconds */
},
{
.type = UE_BULK,
.endpoint = UE_ADDR_ANY,
.direction = UE_DIR_OUT,
.bufsize = URE_TRANSFER_SIZE,
.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
.callback = ure_bulk_write_callback,
.timeout = 10000, /* 10 seconds */
},
#endif
};
static device_method_t ure_methods[] = { static device_method_t ure_methods[] = {
/* Device interface. */ /* Device interface. */
DEVMETHOD(device_probe, ure_probe), DEVMETHOD(device_probe, ure_probe),
DEVMETHOD(device_attach, ure_attach), DEVMETHOD(device_attach, ure_attach),
DEVMETHOD(device_detach, ure_detach), DEVMETHOD(device_detach, ure_detach),
/* MII interface. */ /* MII interface. */
DEVMETHOD(miibus_readreg, ure_miibus_readreg), DEVMETHOD(miibus_readreg, ure_miibus_readreg),
▲ Show 20 Lines • Show All 253 Lines • ▼ Show 20 Linesure_miibus_statchg(device_t dev)
sc->sc_flags &= ~URE_FLAG_LINK; sc->sc_flags &= ~URE_FLAG_LINK;
if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
(IFM_ACTIVE | IFM_AVALID)) { (IFM_ACTIVE | IFM_AVALID)) {
switch (IFM_SUBTYPE(mii->mii_media_active)) { switch (IFM_SUBTYPE(mii->mii_media_active)) {
case IFM_10_T: case IFM_10_T:
case IFM_100_TX: case IFM_100_TX:
sc->sc_flags |= URE_FLAG_LINK; sc->sc_flags |= URE_FLAG_LINK;
sc->sc_rxstarted = 0;
break; break;
case IFM_1000_T: case IFM_1000_T:
if ((sc->sc_flags & URE_FLAG_8152) != 0) if ((sc->sc_flags & URE_FLAG_8152) != 0)
break; break;
sc->sc_flags |= URE_FLAG_LINK; sc->sc_flags |= URE_FLAG_LINK;
sc->sc_rxstarted = 0;
break; break;
default: default:
break; break;
} }
} }
/* Lost link, do nothing. */ /* Lost link, do nothing. */
if ((sc->sc_flags & URE_FLAG_LINK) == 0) if ((sc->sc_flags & URE_FLAG_LINK) == 0)
Show All 35 Linesure_attach(device_t dev)
uint8_t iface_index; uint8_t iface_index;
int error; int error;
sc->sc_flags = USB_GET_DRIVER_INFO(uaa); sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
device_set_usb_desc(dev); device_set_usb_desc(dev);
mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
iface_index = URE_IFACE_IDX; iface_index = URE_IFACE_IDX;
error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_rx_xfer,
ure_config, URE_N_TRANSFER, sc, &sc->sc_mtx); ure_config_rx, URE_N_TRANSFER, sc, &sc->sc_mtx);
if (error != 0) { if (error != 0) {
device_printf(dev, "allocating USB transfers failed\n"); device_printf(dev, "allocating USB RX transfers failed\n");
goto detach; goto detach;
} }
error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_tx_xfer,
ure_config_tx, URE_N_TRANSFER, sc, &sc->sc_mtx);
if (error != 0) {
usbd_transfer_unsetup(sc->sc_rx_xfer, URE_N_TRANSFER);
device_printf(dev, "allocating USB TX transfers failed\n");
goto detach;
}
/* Mark all TX transfers as available */
for (int i = 0; i < URE_N_TRANSFER; i++) {
sc->sc_txavail[i] = sc->sc_tx_xfer[i];
DEVPRINTF(dev, "sc_txavail[%d] = %p\n", i, sc->sc_txavail[i]);
}
sc->sc_txpos = 0;
ue->ue_sc = sc; ue->ue_sc = sc;
ue->ue_dev = dev; ue->ue_dev = dev;
ue->ue_udev = uaa->device; ue->ue_udev = uaa->device;
ue->ue_mtx = &sc->sc_mtx; ue->ue_mtx = &sc->sc_mtx;
ue->ue_methods = &ure_ue_methods; ue->ue_methods = &ure_ue_methods;
error = uether_ifattach(ue); error = uether_ifattach(ue);
if (error != 0) { if (error != 0) {
device_printf(dev, "could not attach interface\n"); device_printf(dev, "could not attach interface\n");
goto detach; goto detach;
} }
return (0); /* success */ return (0); /* success */
detach: detach:
ure_detach(dev); ure_detach(dev);
return (ENXIO); /* failure */ return (ENXIO); /* failure */
} }
static int static int
ure_detach(device_t dev) ure_detach(device_t dev)
{ {
struct ure_softc *sc = device_get_softc(dev); struct ure_softc *sc = device_get_softc(dev);
struct usb_ether *ue = &sc->sc_ue; struct usb_ether *ue = &sc->sc_ue;
usbd_transfer_unsetup(sc->sc_xfer, URE_N_TRANSFER); usbd_transfer_unsetup(sc->sc_tx_xfer, URE_N_TRANSFER);
usbd_transfer_unsetup(sc->sc_rx_xfer, URE_N_TRANSFER);
uether_ifdetach(ue); uether_ifdetach(ue);
mtx_destroy(&sc->sc_mtx); mtx_destroy(&sc->sc_mtx);
return (0); return (0);
} }
/*
* Copy from USB buffers to a new mbuf chain with pkt header.
*
* This will use m_getm2 to get a mbuf chain w/ properly sized mbuf
* clusters as necessary.
*/
static struct mbuf *
ure_makembuf(struct usb_page_cache *pc, usb_frlength_t offset,
usb_frlength_t len)
{
struct usb_page_search_res;
struct mbuf *m, *mb;
usb_frlength_t tlen;
m = m_getm2(NULL, len + ETHER_ALIGN, M_NOWAIT, MT_DATA, M_PKTHDR);
if (m == NULL)
return (m);
hselaskyUnsubmitted
Done
Inline Actions

style: return (m);

hselasky: style: return (m);
/* uether_newbuf does this. */
m_adj(m, ETHER_ALIGN);
m->m_pkthdr.len = len;
for (mb = m; len > 0; mb = mb->m_next) {
tlen = MIN(len, M_TRAILINGSPACE(mb));
hselaskyUnsubmitted
Done
Inline Actions

KASSERT(tlen != 0);

hselasky: KASSERT(tlen != 0);
jmgAuthorUnsubmitted
Done
Inline Actions

not needed

M_TRAILINGSPACE(mb) will always be non-zero, otherwise an mbuf returned by m_getm2 would have no storage space (_TRAILINGSPACE was used instead of M_SIZE because of the m_adj earlier). len is always != 0 due to loop condition.

jmg: not needed M_TRAILINGSPACE(mb) will always be non-zero, otherwise an mbuf returned by m_getm2…
usbd_copy_out(pc, offset, mtod(mb, uint8_t *), tlen);
mb->m_len = tlen;
offset += tlen;
len -= tlen;
}
return (m);
hselaskyUnsubmitted
Done
Inline Actions

style: return (m);

hselasky: style: return (m);
}
static void static void
ure_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) ure_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
{ {
struct ure_softc *sc = usbd_xfer_softc(xfer); struct ure_softc *sc = usbd_xfer_softc(xfer);
struct usb_ether *ue = &sc->sc_ue; struct usb_ether *ue = &sc->sc_ue;
struct ifnet *ifp = uether_getifp(ue); struct ifnet *ifp = uether_getifp(ue);
struct usb_page_cache *pc; struct usb_page_cache *pc;
struct mbuf *m;
struct ure_rxpkt pkt; struct ure_rxpkt pkt;
int actlen, len; int actlen, off, len;
int caps;
uint32_t pktcsum;
usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
switch (USB_GET_STATE(xfer)) { switch (USB_GET_STATE(xfer)) {
case USB_ST_TRANSFERRED: case USB_ST_TRANSFERRED:
off = 0;
pc = usbd_xfer_get_frame(xfer, 0);
caps = if_getcapenable(ifp);
DEVPRINTFN(13, sc->sc_ue.ue_dev, "rcb start\n");
while (actlen > 0) {
if (actlen < (int)(sizeof(pkt))) { if (actlen < (int)(sizeof(pkt))) {
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
goto tr_setup; goto tr_setup;
} }
pc = usbd_xfer_get_frame(xfer, 0); usbd_copy_out(pc, off, &pkt, sizeof(pkt));
usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
off += sizeof(pkt);
actlen -= sizeof(pkt);
len = le32toh(pkt.ure_pktlen) & URE_RXPKT_LEN_MASK; len = le32toh(pkt.ure_pktlen) & URE_RXPKT_LEN_MASK;
len -= ETHER_CRC_LEN;
hselaskyUnsubmitted
Done
Inline Actions

Are you sure the right is not "len > URE_RXPKT_MAX_SEG" ?

hselasky: Are you sure the right is not "len > URE_RXPKT_MAX_SEG" ?
jmgAuthorUnsubmitted
Done
Inline Actions

Yes, I am sure. _MAX_SEG is 2048, and when a packet that is larger (or equal) to 2048, it will return 2048 (I guess it could be ==, but this is safer). So if the length is exactly _MAX_SEG, there is no way to tell if it's just a 2048 byte packet, OR it's part of a multi segment packet.

If I had the programmer's manual for the chip, it'd be easy to fix this, but I don't have access to it.

jmg: Yes, I am sure. _MAX_SEG is 2048, and when a packet that is larger (or equal) to 2048, it will…
if (actlen < (int)(len + sizeof(pkt))) { DEVPRINTFN(13, sc->sc_ue.ue_dev,
"rxpkt: %#x, %#x, %#x, %#x, %#x, %#x\n",
pkt.ure_pktlen, pkt.ure_csum, pkt.ure_misc,
pkt.ure_rsvd2, pkt.ure_rsvd3, pkt.ure_rsvd4);
DEVPRINTFN(13, sc->sc_ue.ue_dev, "len: %d\n", len);
if (len >= URE_RXPKT_MAX_SEG) {
/*
* drop the rest of this segment. With out
* more information, we cannot know where next
* packet starts. Blindly continuing would
* cause a packet in packet attack, allowing
* one VLAN to inject packets w/o a VLAN tag,
* or injecting packets into other VLANs.
*/
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
goto tr_setup; goto tr_setup;
} }
uether_rxbuf(ue, pc, sizeof(pkt), len); if (actlen < len) {
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
goto tr_setup;
}
hselaskyUnsubmitted
Done
Inline Actions

avoid negative length: if (len > ETHER_CRC_LEN)

hselasky: avoid negative length: if (len > ETHER_CRC_LEN)
jmgAuthorUnsubmitted
Done
Inline Actions

Length cannot be negative here due to:
len = le32toh(pkt.ure_pktlen) & URE_RXPKT_LEN_MASK

jmg: Length cannot be negative here due to: len = le32toh(pkt.ure_pktlen) & URE_RXPKT_LEN_MASK
if (len != 0)
m = ure_makembuf(pc, off, len - ETHER_CRC_LEN);
else
m = NULL;
if (m == NULL) {
if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
} else {
/* make mbuf and queue */
pktcsum = le32toh(pkt.ure_csum);
if (caps & IFCAP_VLAN_HWTAGGING &&
pktcsum & URE_RXPKT_RX_VLAN_TAG) {
m->m_pkthdr.ether_vtag =
bswap16(pktcsum &
URE_RXPKT_VLAN_MASK);
m->m_flags |= M_VLANTAG;
}
/* set the necessary flags for rx checksum */
ure_rxcsum(caps, &pkt, m);
uether_rxmbuf(ue, m, len - ETHER_CRC_LEN);
}
off += roundup(len, URE_RXPKT_ALIGN);
actlen -= roundup(len, URE_RXPKT_ALIGN);
}
DEVPRINTFN(13, sc->sc_ue.ue_dev, "rcb end\n");
/* FALLTHROUGH */ /* FALLTHROUGH */
case USB_ST_SETUP: case USB_ST_SETUP:
tr_setup: tr_setup:
usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
usbd_transfer_submit(xfer); usbd_transfer_submit(xfer);
uether_rxflush(ue); uether_rxflush(ue);
return; return;
Show All 13 Lines
static void static void
ure_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) ure_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
{ {
struct ure_softc *sc = usbd_xfer_softc(xfer); struct ure_softc *sc = usbd_xfer_softc(xfer);
struct ifnet *ifp = uether_getifp(&sc->sc_ue); struct ifnet *ifp = uether_getifp(&sc->sc_ue);
struct usb_page_cache *pc; struct usb_page_cache *pc;
struct mbuf *m; struct mbuf *m;
struct ure_txpkt txpkt; struct ure_txpkt txpkt;
uint32_t regtmp;
int len, pos; int len, pos;
int rem;
int caps;
switch (USB_GET_STATE(xfer)) { switch (USB_GET_STATE(xfer)) {
case USB_ST_TRANSFERRED: case USB_ST_TRANSFERRED:
DPRINTFN(11, "transfer complete\n"); DPRINTFN(11, "transfer complete\n");
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
/* FALLTHROUGH */ /* FALLTHROUGH */
case USB_ST_SETUP: case USB_ST_SETUP:
tr_setup: tr_setup:
if ((sc->sc_flags & URE_FLAG_LINK) == 0 || if ((sc->sc_flags & URE_FLAG_LINK) == 0) {
(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { /* don't send anything if there is no link! */
/* break;
* don't send anything if there is no link !
*/
return;
} }
pc = usbd_xfer_get_frame(xfer, 0);
caps = if_getcapenable(ifp);
pos = 0;
rem = URE_TRANSFER_SIZE;
while (rem > sizeof(txpkt)) {
IFQ_DRV_DEQUEUE(&ifp->if_snd, m); IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
if (m == NULL) if (m == NULL)
break; break;
pos = 0;
/*
* make sure we don't ever send too large of a
* packet
*/
len = m->m_pkthdr.len; len = m->m_pkthdr.len;
pc = usbd_xfer_get_frame(xfer, 0); if ((len & URE_TXPKT_LEN_MASK) != len) {
memset(&txpkt, 0, sizeof(txpkt)); device_printf(sc->sc_ue.ue_dev,
"pkt len too large: %#x", len);
pkterror:
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
m_freem(m);
continue;
}
if (sizeof(txpkt) +
roundup(len, URE_TXPKT_ALIGN) > rem) {
/* out of space */
IFQ_DRV_PREPEND(&ifp->if_snd, m);
m = NULL;
break;
}
txpkt = (struct ure_txpkt){};
txpkt.ure_pktlen = htole32((len & URE_TXPKT_LEN_MASK) | txpkt.ure_pktlen = htole32((len & URE_TXPKT_LEN_MASK) |
URE_TKPKT_TX_FS | URE_TKPKT_TX_LS); URE_TKPKT_TX_FS | URE_TKPKT_TX_LS);
if (m->m_flags & M_VLANTAG) {
txpkt.ure_csum = htole32(
bswap16(m->m_pkthdr.ether_vtag &
URE_TXPKT_VLAN_MASK) | URE_TXPKT_VLAN);
}
if (ure_txcsum(m, caps, &regtmp)) {
device_printf(sc->sc_ue.ue_dev,
"pkt l4 off too large");
goto pkterror;
}
txpkt.ure_csum |= htole32(regtmp);
DEVPRINTFN(13, sc->sc_ue.ue_dev,
hselaskyUnsubmitted
Done
Inline Actions

wrap long line.

hselasky: wrap long line.
"txpkt: mbflg: %#x, %#x, %#x\n",
m->m_pkthdr.csum_flags, le32toh(txpkt.ure_pktlen),
le32toh(txpkt.ure_csum));
usbd_copy_in(pc, pos, &txpkt, sizeof(txpkt)); usbd_copy_in(pc, pos, &txpkt, sizeof(txpkt));
pos += sizeof(txpkt); pos += sizeof(txpkt);
usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); rem -= sizeof(txpkt);
pos += m->m_pkthdr.len;
usbd_m_copy_in(pc, pos, m, 0, len);
pos += roundup(len, URE_TXPKT_ALIGN);
rem -= roundup(len, URE_TXPKT_ALIGN);
if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
/* /*
* If there's a BPF listener, bounce a copy * If there's a BPF listener, bounce a copy
* of this frame to him. * of this frame to him.
*/ */
BPF_MTAP(ifp, m); BPF_MTAP(ifp, m);
m_freem(m); m_freem(m);
}
/* no packets to send */
if (pos == 0)
break;
/* Set frame length. */ /* Set frame length. */
usbd_xfer_set_frame_len(xfer, 0, pos); usbd_xfer_set_frame_len(xfer, 0, pos);
usbd_transfer_submit(xfer); usbd_transfer_submit(xfer);
KASSERT(sc->sc_txpos >= 0 && sc->sc_txpos <= URE_N_TRANSFER,
("sc_txpos invalid: %d", sc->sc_txpos));
if (sc->sc_txpos < URE_N_TRANSFER &&
!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
xfer = sc->sc_txavail[sc->sc_txpos++];
usbd_transfer_start(xfer);
}
if (sc->sc_txpos == URE_N_TRANSFER)
ifp->if_drv_flags |= IFF_DRV_OACTIVE; ifp->if_drv_flags |= IFF_DRV_OACTIVE;
hselaskyUnsubmitted
Done
Inline Actions

Do we need to mangle with the OACTIVE flag ? Can we just always have it cleared?

hselasky: Do we need to mangle with the OACTIVE flag ? Can we just always have it cleared?
jmgAuthorUnsubmitted
Done
Inline Actions

Do we need to mangle with the OACTIVE flag ? Can we just always have it cleared?

This will prevent excessive if_start calls under high packet loads, which saves unnecessary lock/unlock cycles that happens by calling it... if_handoff doesn't bother calling if_start (aka ue_start here, which does a lock/unlock cycle) if the _OACTIVE flag is set...

jmg: > Do we need to mangle with the OACTIVE flag ? Can we just always have it cleared? This will…
return; return;
default: /* Error */ default: /* Error */
DPRINTFN(11, "transfer error, %s\n", DPRINTFN(11, "transfer error, %s\n",
usbd_errstr(error)); usbd_errstr(error));
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
if (error == USB_ERR_TIMEOUT) {
DEVPRINTFN(12, sc->sc_ue.ue_dev,
"pkt tx timeout\n");
}
if (error != USB_ERR_CANCELLED) { if (error != USB_ERR_CANCELLED) {
/* try to clear stall first */ /* try to clear stall first */
usbd_xfer_set_stall(xfer); usbd_xfer_set_stall(xfer);
goto tr_setup; goto tr_setup;
} }
return;
} }
KASSERT(sc->sc_txpos > 0 && sc->sc_txpos <= URE_N_TRANSFER, ("sc_txpos invalid: %d", sc->sc_txpos));
sc->sc_txavail[(--(sc->sc_txpos))] = xfer;
if (sc->sc_txpos < URE_N_TRANSFER)
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
} }
static void static void
ure_read_chipver(struct ure_softc *sc) ure_read_chipver(struct ure_softc *sc)
{ {
uint16_t ver; uint16_t ver;
ver = ure_read_2(sc, URE_PLA_TCR1, URE_MCU_TYPE_PLA) & URE_VERSION_MASK; ver = ure_read_2(sc, URE_PLA_TCR1, URE_MCU_TYPE_PLA) & URE_VERSION_MASK;
sc->sc_ver = ver;
switch (ver) { switch (ver) {
case 0x4c00: case 0x4c00:
sc->sc_chip |= URE_CHIP_VER_4C00; sc->sc_chip |= URE_CHIP_VER_4C00;
break; break;
case 0x4c10: case 0x4c10:
sc->sc_chip |= URE_CHIP_VER_4C10; sc->sc_chip |= URE_CHIP_VER_4C10;
break; break;
case 0x5c00: case 0x5c00:
Show All 10 Lines case 0x5c30:
break; break;
default: default:
device_printf(sc->sc_ue.ue_dev, device_printf(sc->sc_ue.ue_dev,
"unknown version 0x%04x\n", ver); "unknown version 0x%04x\n", ver);
break; break;
} }
} }
static int
ure_sysctl_chipver(SYSCTL_HANDLER_ARGS)
{
struct sbuf sb;
struct ure_softc *sc = arg1;
int error;
sbuf_new_for_sysctl(&sb, NULL, 0, req);
sbuf_printf(&sb, "%04x", sc->sc_ver);
error = sbuf_finish(&sb);
sbuf_delete(&sb);
return (error);
}
static void static void
ure_attach_post(struct usb_ether *ue) ure_attach_post(struct usb_ether *ue)
{ {
struct ure_softc *sc = uether_getsc(ue); struct ure_softc *sc = uether_getsc(ue);
struct sysctl_ctx_list *sctx;
struct sysctl_oid *soid;
sc->sc_rxstarted = 0;
sc->sc_phyno = 0; sc->sc_phyno = 0;
/* Determine the chip version. */ /* Determine the chip version. */
ure_read_chipver(sc); ure_read_chipver(sc);
/* Initialize controller and get station address. */ /* Initialize controller and get station address. */
if (sc->sc_flags & URE_FLAG_8152) if (sc->sc_flags & URE_FLAG_8152)
ure_rtl8152_init(sc); ure_rtl8152_init(sc);
Show All 9 Lines ure_read_mem(sc, URE_PLA_BACKUP, URE_MCU_TYPE_PLA,
ue->ue_eaddr, 8); ue->ue_eaddr, 8);
if (ETHER_IS_ZERO(sc->sc_ue.ue_eaddr)) { if (ETHER_IS_ZERO(sc->sc_ue.ue_eaddr)) {
device_printf(sc->sc_ue.ue_dev, "MAC assigned randomly\n"); device_printf(sc->sc_ue.ue_dev, "MAC assigned randomly\n");
arc4rand(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN, 0); arc4rand(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN, 0);
sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */
sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */
} }
sctx = device_get_sysctl_ctx(sc->sc_ue.ue_dev);
soid = device_get_sysctl_tree(sc->sc_ue.ue_dev);
SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "chipver",
CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
ure_sysctl_chipver, "A",
"Return string with chip version.");
} }
static int static int
ure_attach_post_sub(struct usb_ether *ue) ure_attach_post_sub(struct usb_ether *ue)
{ {
struct ure_softc *sc; struct ure_softc *sc;
struct ifnet *ifp; struct ifnet *ifp;
int error; int error;
sc = uether_getsc(ue); sc = uether_getsc(ue);
ifp = ue->ue_ifp; ifp = ue->ue_ifp;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_start = uether_start; ifp->if_start = uether_start;
ifp->if_ioctl = ure_ioctl; ifp->if_ioctl = ure_ioctl;
ifp->if_init = uether_init; ifp->if_init = uether_init;
IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; /*
* Try to keep two transfers full at a time.
* ~(TRANSFER_SIZE / 80 bytes/pkt * 2 buffers in flight)
*/
ifp->if_snd.ifq_drv_maxlen = 512;
IFQ_SET_READY(&ifp->if_snd); IFQ_SET_READY(&ifp->if_snd);
if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0);
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWTAGGING, 0);
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM|IFCAP_HWCSUM, 0);
if_sethwassist(ifp, CSUM_IP|CSUM_IP_UDP|CSUM_IP_TCP);
#ifdef INET6
if_setcapabilitiesbit(ifp, IFCAP_HWCSUM_IPV6, 0);
#endif
if_setcapenable(ifp, if_getcapabilities(ifp));
mtx_lock(&Giant); mtx_lock(&Giant);
error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
mtx_unlock(&Giant); mtx_unlock(&Giant);
return (error); return (error);
} }
static void static void
ure_init(struct usb_ether *ue) ure_init(struct usb_ether *ue)
{ {
struct ure_softc *sc = uether_getsc(ue); struct ure_softc *sc = uether_getsc(ue);
struct ifnet *ifp = uether_getifp(ue); struct ifnet *ifp = uether_getifp(ue);
uint16_t cpcr;
URE_LOCK_ASSERT(sc, MA_OWNED); URE_LOCK_ASSERT(sc, MA_OWNED);
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
return; return;
/* Cancel pending I/O. */ /* Cancel pending I/O. */
ure_stop(ue); ure_stop(ue);
Show All 9 Linesure_init(struct usb_ether *ue)
/* Reset the packet filter. */ /* Reset the packet filter. */
ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA, ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA,
ure_read_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA) & ure_read_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA) &
~URE_FMC_FCR_MCU_EN); ~URE_FMC_FCR_MCU_EN);
ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA, ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA,
ure_read_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA) | ure_read_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA) |
URE_FMC_FCR_MCU_EN); URE_FMC_FCR_MCU_EN);
/* Enable RX VLANs if enabled */
cpcr = ure_read_2(sc, URE_PLA_CPCR, URE_MCU_TYPE_PLA);
if (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) {
DEVPRINTFN(12, sc->sc_ue.ue_dev, "enabled hw vlan tag\n");
cpcr |= URE_CPCR_RX_VLAN;
} else {
DEVPRINTFN(12, sc->sc_ue.ue_dev, "disabled hw vlan tag\n");
cpcr &= ~URE_CPCR_RX_VLAN;
}
ure_write_2(sc, URE_PLA_CPCR, URE_MCU_TYPE_PLA, cpcr);
hselaskyUnsubmitted
Done
Inline Actions

Make this a single line.

hselasky: Make this a single line.
/* Enable transmit and receive. */ /* Enable transmit and receive. */
ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA, ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA,
ure_read_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA) | URE_CR_RE | ure_read_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA) | URE_CR_RE |
URE_CR_TE); URE_CR_TE);
ure_write_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA, ure_write_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA,
ure_read_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA) & ure_read_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA) &
~URE_RXDY_GATED_EN); ~URE_RXDY_GATED_EN);
/* Configure RX filters. */ /* Configure RX filters. */
ure_rxfilter(ue); ure_rxfilter(ue);
usbd_xfer_set_stall(sc->sc_xfer[URE_BULK_DT_WR]); usbd_xfer_set_stall(sc->sc_tx_xfer[0]);
hselaskyUnsubmitted
Done
Inline Actions

It is enough to set stall on the first TX transfer, else the USB stack will clear stall multiple times.

hselasky: It is enough to set stall on the first TX transfer, else the USB stack will clear stall…
jmgAuthorUnsubmitted
Done
Inline Actions

Thanks, wasn't sure what the correct process was, just did everything 4x for each xfer (except _start, but I explain why elsewhere).

jmg: Thanks, wasn't sure what the correct process was, just did everything 4x for each xfer (except…
/* Indicate we are up and running. */ /* Indicate we are up and running. */
ifp->if_drv_flags |= IFF_DRV_RUNNING; ifp->if_drv_flags |= IFF_DRV_RUNNING;
/* Switch to selected media. */ /* Switch to selected media. */
ure_ifmedia_upd(ifp); ure_ifmedia_upd(ifp);
} }
static void static void
ure_tick(struct usb_ether *ue) ure_tick(struct usb_ether *ue)
{ {
struct ure_softc *sc = uether_getsc(ue); struct ure_softc *sc = uether_getsc(ue);
struct ifnet *ifp = uether_getifp(ue);
struct mii_data *mii = GET_MII(sc); struct mii_data *mii = GET_MII(sc);
URE_LOCK_ASSERT(sc, MA_OWNED); URE_LOCK_ASSERT(sc, MA_OWNED);
KASSERT(sc->sc_txpos >= 0 && sc->sc_txpos <= URE_N_TRANSFER, ("sc_txpos invalid: %d", sc->sc_txpos));
(void)ifp;
DEVPRINTFN(13, sc->sc_ue.ue_dev,
"sc_txpos: %d, oactive: %d\n", sc->sc_txpos, !!(ifp->if_drv_flags & IFF_DRV_OACTIVE));
for (int i = 0; i < URE_N_TRANSFER; i++)
DEVPRINTFN(13, sc->sc_ue.ue_dev,
"rx[%d] = %d\n", i, USB_GET_STATE(sc->sc_rx_xfer[i]));
for (int i = 0; i < URE_N_TRANSFER; i++)
DEVPRINTFN(13, sc->sc_ue.ue_dev,
"tx[%d] = %d\n", i, USB_GET_STATE(sc->sc_tx_xfer[i]));
mii_tick(mii); mii_tick(mii);
if ((sc->sc_flags & URE_FLAG_LINK) == 0 if ((sc->sc_flags & URE_FLAG_LINK) == 0
&& mii->mii_media_status & IFM_ACTIVE && && mii->mii_media_status & IFM_ACTIVE &&
IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
sc->sc_flags |= URE_FLAG_LINK; sc->sc_flags |= URE_FLAG_LINK;
sc->sc_rxstarted = 0;
ure_start(ue); ure_start(ue);
} }
} }
static u_int static u_int
ure_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) ure_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
{ {
uint32_t h, *hashes = arg; uint32_t h, *hashes = arg;
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Linesdone:
ure_write_4(sc, URE_PLA_MAR4, URE_MCU_TYPE_PLA, hashes[1]); ure_write_4(sc, URE_PLA_MAR4, URE_MCU_TYPE_PLA, hashes[1]);
ure_write_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode); ure_write_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode);
} }
static void static void
ure_start(struct usb_ether *ue) ure_start(struct usb_ether *ue)
{ {
struct ure_softc *sc = uether_getsc(ue); struct ure_softc *sc = uether_getsc(ue);
struct usb_xfer *xfer;
struct ifnet *ifp;
URE_LOCK_ASSERT(sc, MA_OWNED);
if (!sc->sc_rxstarted) {
sc->sc_rxstarted = 1;
for (int i = 0; i < URE_N_TRANSFER; i++)
usbd_transfer_start(sc->sc_rx_xfer[i]);
}
/* /*
* start the USB transfers, if not already started: * start the USB transfers, if not already started:
*/ */
usbd_transfer_start(sc->sc_xfer[URE_BULK_DT_RD]); if (sc->sc_txpos == URE_N_TRANSFER) {
usbd_transfer_start(sc->sc_xfer[URE_BULK_DT_WR]); ifp = uether_getifp(&sc->sc_ue);
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
return;
} }
KASSERT(sc->sc_txpos >= 0 && sc->sc_txpos < URE_N_TRANSFER, ("sc_txpos invalid: %d", sc->sc_txpos));
xfer = sc->sc_txavail[sc->sc_txpos++];
if (sc->sc_txpos == URE_N_TRANSFER) {
ifp = uether_getifp(&sc->sc_ue);
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
}
usbd_transfer_start(xfer);
}
static void static void
ure_reset(struct ure_softc *sc) ure_reset(struct ure_softc *sc)
{ {
int i; int i;
ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA, URE_CR_RST); ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA, URE_CR_RST);
for (i = 0; i < URE_TIMEOUT; i++) { for (i = 0; i < URE_TIMEOUT; i++) {
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Linesure_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
struct ure_softc *sc; struct ure_softc *sc;
struct ifreq *ifr; struct ifreq *ifr;
int error, mask, reinit; int error, mask, reinit;
sc = uether_getsc(ue); sc = uether_getsc(ue);
ifr = (struct ifreq *)data; ifr = (struct ifreq *)data;
error = 0; error = 0;
reinit = 0; reinit = 0;
if (cmd == SIOCSIFCAP) { switch (cmd) {
case SIOCSIFCAP:
URE_LOCK(sc); URE_LOCK(sc);
mask = ifr->ifr_reqcap ^ ifp->if_capenable; mask = ifr->ifr_reqcap ^ ifp->if_capenable;
if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&
(ifp->if_capabilities & IFCAP_VLAN_HWTAGGING) != 0) {
ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
reinit++;
}
if ((mask & IFCAP_TXCSUM) != 0 &&
(ifp->if_capabilities & IFCAP_TXCSUM) != 0) {
ifp->if_capenable ^= IFCAP_TXCSUM;
}
if ((mask & IFCAP_RXCSUM) != 0 &&
(ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
ifp->if_capenable ^= IFCAP_RXCSUM;
}
if ((mask & IFCAP_TXCSUM_IPV6) != 0 &&
(ifp->if_capabilities & IFCAP_TXCSUM_IPV6) != 0) {
ifp->if_capenable ^= IFCAP_TXCSUM_IPV6;
}
if ((mask & IFCAP_RXCSUM_IPV6) != 0 &&
(ifp->if_capabilities & IFCAP_RXCSUM_IPV6) != 0) {
ifp->if_capenable ^= IFCAP_RXCSUM_IPV6;
}
if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING) if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING)
ifp->if_drv_flags &= ~IFF_DRV_RUNNING; ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
else else
reinit = 0; reinit = 0;
URE_UNLOCK(sc); URE_UNLOCK(sc);
if (reinit > 0) if (reinit > 0)
uether_init(ue); uether_init(ue);
} else break;
case SIOCSIFMTU:
/* in testing 9216 MTU (9230 pkt size) resets device */
/* we use < _MAX_SEG to prevent packet in packet attacks */
if (ifr->ifr_mtu < ETHERMIN ||
ifr->ifr_mtu > (URE_RXPKT_MAX_SEG - 1 - ETHER_HDR_LEN -
ETHER_VLAN_ENCAP_LEN - ETHER_CRC_LEN)) {
error = EINVAL;
break;
}
URE_LOCK(sc);
if (if_getmtu(ifp) != ifr->ifr_mtu)
if_setmtu(ifp, ifr->ifr_mtu);
URE_UNLOCK(sc);
break;
default:
error = uether_ioctl(ifp, cmd, data); error = uether_ioctl(ifp, cmd, data);
}
return (error); return (error);
} }
static void static void
ure_rtl8152_init(struct ure_softc *sc) ure_rtl8152_init(struct ure_softc *sc)
{ {
uint32_t pwrctrl; uint32_t pwrctrl;
Show All 22 Linesure_rtl8152_init(struct ure_softc *sc)
pwrctrl = ure_read_4(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA); pwrctrl = ure_read_4(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA);
pwrctrl &= ~URE_MCU_CLK_RATIO_MASK; pwrctrl &= ~URE_MCU_CLK_RATIO_MASK;
pwrctrl |= URE_MCU_CLK_RATIO | URE_D3_CLK_GATED_EN; pwrctrl |= URE_MCU_CLK_RATIO | URE_D3_CLK_GATED_EN;
ure_write_4(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA, pwrctrl); ure_write_4(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA, pwrctrl);
ure_write_2(sc, URE_PLA_GPHY_INTR_IMR, URE_MCU_TYPE_PLA, ure_write_2(sc, URE_PLA_GPHY_INTR_IMR, URE_MCU_TYPE_PLA,
URE_GPHY_STS_MSK | URE_SPEED_DOWN_MSK | URE_SPDWN_RXDV_MSK | URE_GPHY_STS_MSK | URE_SPEED_DOWN_MSK | URE_SPDWN_RXDV_MSK |
URE_SPDWN_LINKCHG_MSK); URE_SPDWN_LINKCHG_MSK);
/* Disable Rx aggregation. */ /* Enable Rx aggregation. */
ure_write_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB, ure_write_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB,
ure_read_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) | ure_read_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) &
URE_RX_AGG_DISABLE); ~URE_RX_AGG_DISABLE);
/* Disable ALDPS. */ /* Disable ALDPS. */
ure_ocp_reg_write(sc, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA | ure_ocp_reg_write(sc, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA |
URE_DIS_SDSAVE); URE_DIS_SDSAVE);
uether_pause(&sc->sc_ue, hz / 50); uether_pause(&sc->sc_ue, hz / 50);
ure_init_fifo(sc); ure_init_fifo(sc);
▲ Show 20 Lines • Show All 132 Lines • ▼ Show 20 Linesure_rtl8153_init(struct ure_softc *sc)
/* Disable ALDPS. */ /* Disable ALDPS. */
ure_ocp_reg_write(sc, URE_OCP_POWER_CFG, ure_ocp_reg_write(sc, URE_OCP_POWER_CFG,
ure_ocp_reg_read(sc, URE_OCP_POWER_CFG) & ~URE_EN_ALDPS); ure_ocp_reg_read(sc, URE_OCP_POWER_CFG) & ~URE_EN_ALDPS);
uether_pause(&sc->sc_ue, hz / 50); uether_pause(&sc->sc_ue, hz / 50);
ure_init_fifo(sc); ure_init_fifo(sc);
/* Disable Rx aggregation. */ /* Enable Rx aggregation. */
ure_write_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB, ure_write_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB,
ure_read_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) | ure_read_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) &
URE_RX_AGG_DISABLE); ~URE_RX_AGG_DISABLE);
val = ure_read_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB); val = ure_read_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);
if (!(sc->sc_chip & (URE_CHIP_VER_5C00 | URE_CHIP_VER_5C10))) if (!(sc->sc_chip & (URE_CHIP_VER_5C00 | URE_CHIP_VER_5C10)))
val |= URE_U2P3_ENABLE; val |= URE_U2P3_ENABLE;
else else
val &= ~URE_U2P3_ENABLE; val &= ~URE_U2P3_ENABLE;
ure_write_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val); ure_write_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);
memset(u1u2, 0xff, sizeof(u1u2)); memset(u1u2, 0xff, sizeof(u1u2));
ure_write_mem(sc, URE_USB_TOLERANCE, ure_write_mem(sc, URE_USB_TOLERANCE,
URE_MCU_TYPE_USB | URE_BYTE_EN_SIX_BYTES, u1u2, sizeof(u1u2)); URE_MCU_TYPE_USB | URE_BYTE_EN_SIX_BYTES, u1u2, sizeof(u1u2));
} }
static void static void
ure_stop(struct usb_ether *ue) ure_stop(struct usb_ether *ue)
{ {
struct ure_softc *sc = uether_getsc(ue); struct ure_softc *sc = uether_getsc(ue);
struct ifnet *ifp = uether_getifp(ue); struct ifnet *ifp = uether_getifp(ue);
URE_LOCK_ASSERT(sc, MA_OWNED); URE_LOCK_ASSERT(sc, MA_OWNED);
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
sc->sc_flags &= ~URE_FLAG_LINK; sc->sc_flags &= ~URE_FLAG_LINK;
sc->sc_rxstarted = 0;
/* /*
* stop all the transfers, if not already stopped: * stop all the transfers, if not already stopped:
*/ */
usbd_transfer_stop(sc->sc_xfer[URE_BULK_DT_WR]); for (int i = 0; i < URE_N_TRANSFER; i++) {
usbd_transfer_stop(sc->sc_xfer[URE_BULK_DT_RD]); usbd_transfer_stop(sc->sc_rx_xfer[i]);
usbd_transfer_stop(sc->sc_tx_xfer[i]);
} }
}
static void static void
ure_disable_teredo(struct ure_softc *sc) ure_disable_teredo(struct ure_softc *sc)
{ {
ure_write_4(sc, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA, ure_write_4(sc, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA,
ure_read_4(sc, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA) & ure_read_4(sc, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA) &
~(URE_TEREDO_SEL | URE_TEREDO_RS_EVENT_MASK | URE_OOB_TEREDO_EN)); ~(URE_TEREDO_SEL | URE_TEREDO_RS_EVENT_MASK | URE_OOB_TEREDO_EN));
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_FULL) {
rx_fifo2 = URE_RXFIFO_THR3_HIGH; rx_fifo2 = URE_RXFIFO_THR3_HIGH;
} }
ure_write_4(sc, URE_PLA_RXFIFO_CTRL1, URE_MCU_TYPE_PLA, rx_fifo1); ure_write_4(sc, URE_PLA_RXFIFO_CTRL1, URE_MCU_TYPE_PLA, rx_fifo1);
ure_write_4(sc, URE_PLA_RXFIFO_CTRL2, URE_MCU_TYPE_PLA, rx_fifo2); ure_write_4(sc, URE_PLA_RXFIFO_CTRL2, URE_MCU_TYPE_PLA, rx_fifo2);
/* Configure Tx FIFO threshold. */ /* Configure Tx FIFO threshold. */
ure_write_4(sc, URE_PLA_TXFIFO_CTRL, URE_MCU_TYPE_PLA, ure_write_4(sc, URE_PLA_TXFIFO_CTRL, URE_MCU_TYPE_PLA,
URE_TXFIFO_THR_NORMAL); URE_TXFIFO_THR_NORMAL);
}
/*
* Update mbuf for rx checksum from hardware
*/
static void
ure_rxcsum(int capenb, struct ure_rxpkt *rp, struct mbuf *m)
{
int flags;
uint32_t csum, misc;
int tcp, udp;
m->m_pkthdr.csum_flags = 0;
if (!(capenb & IFCAP_RXCSUM))
return;
csum = le32toh(rp->ure_csum);
misc = le32toh(rp->ure_misc);
tcp = udp = 0;
flags = 0;
if (csum & URE_RXPKT_IPV4_CS)
flags |= CSUM_IP_CHECKED;
else if (csum & URE_RXPKT_IPV6_CS)
flags = 0;
tcp = rp->ure_csum & URE_RXPKT_TCP_CS;
udp = rp->ure_csum & URE_RXPKT_UDP_CS;
if (__predict_true((flags & CSUM_IP_CHECKED) &&
!(misc & URE_RXPKT_IP_F))) {
flags |= CSUM_IP_VALID;
}
if (__predict_true(
(tcp && !(misc & URE_RXPKT_TCP_F)) ||
(udp && !(misc & URE_RXPKT_UDP_F)))) {
flags |= CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
m->m_pkthdr.csum_data = 0xFFFF;
}
m->m_pkthdr.csum_flags = flags;
}
/*
* If the L4 checksum offset is larger than 0x7ff (2047), return failure.
* We currently restrict MTU such that it can't happen, and even if we
* did have a large enough MTU, only a very specially crafted IPv6 packet
* with MANY headers could possibly come close.
*
* Returns 0 for success, and 1 if the packet cannot be checksummed and
* should be dropped.
*/
static int
ure_txcsum(struct mbuf *m, int caps, uint32_t *regout)
{
struct ip ip;
struct ether_header *eh;
int flags;
uint32_t data;
uint32_t reg;
int l3off, l4off;
uint16_t type;
*regout = 0;
flags = m->m_pkthdr.csum_flags;
if (flags == 0)
return (0);
if (__predict_true(m->m_len >= (int)sizeof(*eh))) {
eh = mtod(m, struct ether_header *);
type = eh->ether_type;
} else
m_copydata(m, offsetof(struct ether_header, ether_type),
sizeof(type), (caddr_t)&type);
switch (type = htons(type)) {
case ETHERTYPE_IP:
case ETHERTYPE_IPV6:
l3off = ETHER_HDR_LEN;
break;
case ETHERTYPE_VLAN:
/* XXX - what about QinQ? */
l3off = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
break;
default:
return (0);
}
reg = 0;
if (flags & CSUM_IP)
reg |= URE_TXPKT_IPV4_CS;
data = m->m_pkthdr.csum_data;
if (flags & (CSUM_IP_TCP | CSUM_IP_UDP)) {
m_copydata(m, l3off, sizeof ip, (caddr_t)&ip);
l4off = l3off + (ip.ip_hl << 2) + data;
if (__predict_false(l4off > URE_L4_OFFSET_MAX))
return (1);
reg |= URE_TXPKT_IPV4_CS;
if (flags & CSUM_IP_TCP)
reg |= URE_TXPKT_TCP_CS;
else if (flags & CSUM_IP_UDP)
reg |= URE_TXPKT_UDP_CS;
reg |= l4off << URE_L4_OFFSET_SHIFT;
}
#ifdef INET6
else if (flags & (CSUM_IP6_TCP | CSUM_IP6_UDP)) {
l4off = l3off + data;
if (__predict_false(l4off > URE_L4_OFFSET_MAX))
return (1);
reg |= URE_TXPKT_IPV6_CS;
if (flags & CSUM_IP6_TCP)
reg |= URE_TXPKT_TCP_CS;
else if (flags & CSUM_IP6_UDP)
reg |= URE_TXPKT_UDP_CS;
reg |= l4off << URE_L4_OFFSET_SHIFT;
}
#endif
*regout = reg;
return 0;
} }
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head/sys/arm64/rockchip/clk/rk_clk_composite.c

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head/sys/arm64/rockchip/clk/rk_cru.c

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