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Differential D17953

RISC-V: Implement get_cyclecount(9)
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Authored by mhorne063_gmail.com on Nov 11 2018, 10:24 PM.

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br
markj
jhb

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rS340400: RISC-V: Implement get_cyclecount(9).

Summary

Add the missing implementation for get_cyclecount(9) on RISC-V by reading the cycle CSR.

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Event Timeline

mhorne063_gmail.com created this revision.Nov 11 2018, 10:24 PM

mhorne063_gmail.com added a parent revision: D17952: RISC-V: Add macros for reading performance counter CSRs.

markj added a reviewer: jhb.Nov 12 2018, 5:30 PM

jhb accepted this revision.Nov 12 2018, 7:11 PM

This revision is now accepted and ready to land.Nov 12 2018, 7:11 PM

markj accepted this revision.Nov 13 2018, 1:45 AM

markj added inline comments.

sys/riscv/include/cpu.h
43	This could probably be sorted before frame.h.

mhorne063_gmail.com updated this revision to Diff 50351.Nov 13 2018, 3:42 AM

This revision now requires review to proceed.Nov 13 2018, 3:42 AM

mhorne063_gmail.com marked an inline comment as done.Nov 13 2018, 3:42 AM

This revision was not accepted when it landed; it landed in state Needs Review.Nov 13 2018, 6:20 PM

Closed by commit rS340400: RISC-V: Implement get_cyclecount(9). (authored by markj). · Explain Why

This revision was automatically updated to reflect the committed changes.

Herald added a subscriber: imp. · View Herald TranscriptNov 13 2018, 6:20 PM

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sys/

riscv/

include/

4 lines

Diff 50351

sys/riscv/include/cpu.h

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