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Table of Contentst

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sys/mips/
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mips/
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include/
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cpuregs.h
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pmap.h
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pte.h
5/6
vm.h
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mips/
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pmap.c

Implement pmap_change_attr and related APIs on MIPS
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Authored by kan on Dec 23 2016, 7:20 PM.

Details

Reviewers

brooks
jhb
imp
adrian
br

Group Reviewers

MIPS

Commits

rS310650: Implement pmap_change_attr and related APIs on MIPS

Summary

On platforms that have uncached-accelerate cache attribute, map it
to VM_MEMATTR_WRITE_COMBINING.

Test Plan

Map JZ4780 framebuffer and fill it with zeroes in loops in different mode.
Observe write-combining outperform cached accesses by about ~2x and uncached
mapping by ~35x.

Diff Detail

Lint

Lint Skipped

Unit

Tests Skipped

Event Timeline

kan updated this revision to Diff 23221.Dec 23 2016, 7:20 PM

kan retitled this revision from to Implement pmap_change_attr and related APIs on MIPS.

kan updated this object.

kan edited the test plan for this revision. (Show Details)

kan added reviewers: adrian, imp, br, brooks, MIPS, jhb.

kan set the repository for this revision to rS FreeBSD src repository - subversion.

cool. mips24k/mips74k have this as well, it'd be interesting to try it out.

This revision is now accepted and ready to land.Dec 23 2016, 7:45 PM

kan added inline comments.Dec 23 2016, 9:43 PM

sys/mips/include/pmap.h
78	Typo in reformatting.

Fix typo

This revision now requires review to proceed.Dec 23 2016, 10:18 PM

Do dot define VM_MEMATTR_WRITE_COMBINING as uncached as the fallback option, some userland tools expect VM_MEMATTR_WRITE_COMBINING and VM_MEMATTR_UNCACHEABLE be numerically different.

Closed by commit rS310650: Implement pmap_change_attr and related APIs on MIPS (authored by kan). · Explain WhyDec 28 2016, 2:55 AM

This revision was automatically updated to reflect the committed changes.

Revision Contents
Changeset List

Path

Size

sys/

mips/

include/

16 lines

9 lines

3 lines

6 lines

mips/

pmap.c

191 lines

Diff 23226

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sys/mips/include/cpuregs.h

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

View Options

sys/mips/include/pmap.h

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

View Options

sys/mips/include/pte.h

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

View Options

sys/mips/include/vm.h

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

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Implement pmap_change_attr and related APIs on MIPSClosedPublicActions

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Diff Detail

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Revision ContentsChangeset List

Diff 23226

sys/mips/include/cpuregs.h

sys/mips/include/pmap.h

sys/mips/include/pte.h

sys/mips/include/vm.h

sys/mips/mips/pmap.c

Implement pmap_change_attr and related APIs on MIPS
ClosedPublic
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Revision Contents
Changeset List