Implement pmap_change_attr and related APIs on MIPS
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Authored by kan on Dec 23 2016, 7:20 PM.

Details

Reviewers

brooks
jhb
imp
adrian
br

Group Reviewers

MIPS

Commits

rS310650: Implement pmap_change_attr and related APIs on MIPS

Summary

On platforms that have uncached-accelerate cache attribute, map it
to VM_MEMATTR_WRITE_COMBINING.

Test Plan

Map JZ4780 framebuffer and fill it with zeroes in loops in different mode.
Observe write-combining outperform cached accesses by about ~2x and uncached
mapping by ~35x.

Diff Detail

Repository

rS FreeBSD src repository - subversion

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Lint Not Applicable

Unit

Tests Not Applicable

Event Timeline

kan updated this revision to Diff 23221.Dec 23 2016, 7:20 PM

kan retitled this revision from to Implement pmap_change_attr and related APIs on MIPS.

kan updated this object.

kan edited the test plan for this revision. (Show Details)

kan added reviewers: adrian, imp, br, brooks, MIPS, jhb.

kan set the repository for this revision to rS FreeBSD src repository - subversion.

cool. mips24k/mips74k have this as well, it'd be interesting to try it out.

This revision is now accepted and ready to land.Dec 23 2016, 7:45 PM

kan added inline comments.Dec 23 2016, 9:43 PM

sys/mips/include/pmap.h
78 ↗	(On Diff #23221)	Typo in reformatting.

Fix typo

This revision now requires review to proceed.Dec 23 2016, 10:18 PM

Do dot define VM_MEMATTR_WRITE_COMBINING as uncached as the fallback option, some userland tools expect VM_MEMATTR_WRITE_COMBINING and VM_MEMATTR_UNCACHEABLE be numerically different.

Closed by commit rS310650: Implement pmap_change_attr and related APIs on MIPS (authored by kan). · Explain WhyDec 28 2016, 2:55 AM

This revision was automatically updated to reflect the committed changes.