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sdhci_fsl: add ACPI front-end for NXP Layerscape eSDHC (NXP0003)
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Authored by yarshure_gmail.com on Jul 15 2026, 2:56 PM.
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Details

Summary

Refactor the FDT-only sdhci_fsl driver into a bus-agnostic base class
(DEFINE_CLASS_0 "sdhci_fsl") plus FDT and ACPI subclasses, mirroring
sdhci_xenon. A shared sdhci_fsl_attach_common() does the controller
bring-up; each front-end supplies the bus-specific bits (soc_data, base
clock, endianness, mmc host properties, card-detect).

The new ACPI front-end (sdhci_fsl_acpi.c) matches _HID NXP0003, reads the
base clock from the _DSD "clock-frequency" property (there is no FDT clock
framework under ACPI), and brings up the eSDHC controllers described by
UEFI/EDK2 firmware. On a SolidRun LX2160A CEX7 booting via EDK2 this
exposes the SD/TF card (/dev/mmcsd0) and eMMC (/dev/mmcsd1) that were
previously invisible because no driver matched NXP0003.

  • New sdhci_fsl.h: shared softc, soc_data and DECLARE_CLASS(sdhci_fsl_driver).
  • sdhci_fsl_fdt.c: split attach into an FDT prologue + bus-agnostic sdhci_fsl_attach_common(); base class + FDT subclass; declare the mmc bridge on the shared "sdhci_fsl" devclass; guard get_ro for the no-GPIO (ACPI) case.
  • sdhci_fsl_acpi.c: NXP0003 ACPI binding; base clock from _DSD; generic card-present; mark the slot non-removable (eSDHC present-state card detect is unreliable); cap to high speed pending UHS tuning support.

Developed with AI assistance; the design was reviewed by hand and the
driver was hardware-tested (see Test Plan).

MFC after: 2 weeks

Test Plan

Hardware-tested on a SolidRun HoneyComb / CEX7 (LX2160A) booting via
EDK2/UEFI (ACPI). Before this change nothing matched _HID NXP0003, so the
eSDHC controllers were unattached; after it both slots probe and come up:

mmc0:   <MMC/SD bus> ... on sdhci_fsl_acpi0
mmcsd0: <MMCHC ...>       (SD/TF card)
mmc1:   <MMC/SD bus> ... on sdhci_fsl_acpi1
mmcsd1: <MMCHC ...>       (eMMC)

/dev/mmcsd0 and /dev/mmcsd1 read and write correctly (~23 MB/s read).

The FDT path is preserved unchanged -- the refactor only splits the
existing sdhci_fsl_attach() into an FDT prologue plus a bus-agnostic
sdhci_fsl_attach_common(), mirroring sdhci_xenon's base/FDT/ACPI split.
It has not been re-tested on an FDT-booted board; a smoke test there is
welcome.

Two ACPI-specific choices worth a look: the base clock is read from the
_DSD "clock-frequency" property (no FDT clock framework under ACPI), and
the slot is marked non-removable + capped to high speed (eSDHC
present-state card detect is unreliable; UHS tuning is future work).

Diff Detail

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Unit
Tests Skipped

Event Timeline

Re-uploaded with full context (git diff -U999999).

adrian added a subscriber: adrian.

I believe you need to add your name / email address in the copyright for the new files you've written. Would you mind doing that please?

Done, thanks — new diff uploaded.

sdhci_fsl.h and sdhci_fsl_acpi.c now carry

Copyright (c) 2026 Xiangbo Kong <yarshure@gmail.com>

plus the full BSD-2-Clause text, matching the surrounding sdhci files.

I left sdhci_fsl_fdt.c's Alstom/Semihalf copyright as it is, since my change
there is a refactor (softc and the shared helpers moved out into sdhci_fsl.h);
say the word if you'd like a line added there too.

Same fix applied to D58258: its two new files had picked up a stray "The FreeBSD
Foundation" copyright from the neighbouring sfp_fdt.c header. Corrected there as
well, diff updated.

adrian added inline comments.
sys/dev/sdhci/sdhci_fsl_acpi.c
1

don't need the '-' here either.

6

you don't need the full copyright! the spdx header and copyright is just fine!

This revision is now accepted and ready to land.Fri, Sep 11, 5:37 AM

looking good, please keep it up!

sys/dev/sdhci/sdhci_fsl_fdt.c
932

I'm ok with things like this; but ideally there'd be a bitmask somewhere of driver capabilities and/or some further abstraction out so the fdt gpio method isn't even callled for acpi. This is now common code, and yeah it likely should belong elsewhere now but let's .. leave that cleanup until this has landed and baked a bunch.

999

quirks

Thanks for the accept.

Typo fixed: quriks -> quirks. It is pre-existing upstream text that this
change relocates, so the removal hunk keeps the original spelling and the
added one is corrected.

On the -HEAD requirement from earlier: this is now built and boot-tested on
16.0-CURRENT (main-b7541acacb66) on the LX2160A, not just on 15.1. Both
controllers attach through ACPI and both cards enumerate:

sdhci_fsl0: <NXP QorIQ Layerscape eSDHC controller> iomem 0x2140000-0x214ffff irq 2 on acpi0
sdhci_fsl0: clock-frequency=700000000 Hz, baseclk_hz=350000000 (div=2)
mmc0: <MMC/SD bus> on sdhci_fsl0
sdhci_fsl1: <NXP QorIQ Layerscape eSDHC controller> iomem 0x2150000-0x215ffff irq 3 on acpi0
mmc1: <MMC/SD bus> on sdhci_fsl1

/dev/mmcsd0  /dev/mmcsd1  /dev/mmcsd1boot0  /dev/mmcsd1boot1
/dev/mmcsd1rpmb  /dev/mmcsd1s1

Real I/O, not just device nodes: 64 MB read from the TF card at 23.5 MB/s,
32 MB from the eMMC at 45.6 MB/s, and offset 0x1000 of mmcsd0 reads
55 aa 55 aa, the LX2160A RCW preamble, confirming it is the boot card. No
panics.

On the sc->acpi / GPIO card-detect point: I agree, and I have that
abstraction written and tested rather than just planned. sc->acpi goes away
entirely, replaced by optional front-end hooks in the softc set before
sdhci_fsl_attach_common() -- cd_wp_setup, cd_wp_teardown, voltage_fixup --
so the FDT GPIO code is not merely skipped on ACPI, it is never reached.
The FDT-specific methods (mmcbr_get_ro, mmcbr_switch_vccq, mmcbr_update_ios,
sdhci_get_card_present) move from the base class method table into the FDT
subclass table; their bodies are untouched, so an FDT device still resolves
to exactly the same functions, and ACPI falls through to the generic ones it
was reaching by hand before. That also lets conf/files drop the fdt, gpio,
regulator and clk conditions from the ACPI front-end, which is what first
sent me down this path.

It is build-clean with -Werror and boot-tested on both 15.1 and
16.0-CURRENT. But you asked to let this bake first, and that is your call
to make -- I have not put it in this revision. Say the word once this has
landed and I will post it as a follow-up.

This revision now requires review to proceed.Sat, Sep 12, 5:49 AM