To maintain coherence between cache and DMA memory appropriate
shareability flags need to be set in the PTE regardless of SMP
option.
Reviewed by:
Obtained from: Semihalf
Sponsored by: Cavium
Differential D6231
Fix I/O coherence issues on ThunderX when SMP is disabled zbb on May 5 2016, 5:20 PM. Authored by Tags None Referenced Files
Details
To maintain coherence between cache and DMA memory appropriate Reviewed by:
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