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ARM: Fix dma_dcache_sync()
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Authored by mmel on Nov 10 2015, 12:53 PM.
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Details

Summary

Drivers can request DMA to buffers that are not in memory represented in the vm page arrays. Because of this, store KVA of already mapped buffer to synclist and use it in dma_dcache_sync().

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rS FreeBSD src repository - subversion
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mmel retitled this revision from to ARM: Fix dma_dcache_sync().
mmel updated this object.
mmel edited the test plan for this revision. (Show Details)
mmel added reviewers: jah, ian, kib.
mmel set the repository for this revision to rS FreeBSD src repository - subversion.
mmel added a subscriber: ARM.
sys/arm/arm/busdma_machdep-v6.c
1127–1138 ↗(On Diff #10086)

Since you're storing the paddr in the sl alongside pages, why not always assign paddr to curaddr in sync_phys() and sync_buf()? Then you could always use paddr as the starting address for cache maintenance, and you won't need this function.

I can at least confirm that this patch fixes the following problem on a Banana Pi Pro

Fatal kernel mode data abort: 'Translation Fault (L1)' on read
trapframe: 0xc0913ae8
FSR=00000005, FAR=00000020, spsr=20000013
r0 =c3ad3c48, r1 =c3ad3c38, r2 =00000001, r3 =00000001
r4 =00000cc0, r5 =00000000, r6 =c3b1fc00, r7 =00000000
r8 =00000040, r9 =c3ad3c00, r10=c0858c2c, r11=c0913ba8
r12=c3b31000, ssp=c0913b78, slr=c07418e8, pc =c0715f90

[ thread pid 0 tid 100000 ]
Stopped at      _bus_dmamap_sync+0x280: ldr     r0, [r5, #0x020]
mmel removed rS FreeBSD src repository - subversion as the repository for this revision.
mmel marked an inline comment as done.Nov 18 2015, 1:37 PM

Good catch! Moreover, sl->dataoffs becomes superfluous because we have physical address in all cases. And sorry for my delay...

jah edited edge metadata.
This revision is now accepted and ready to land.Nov 18 2015, 3:20 PM
This revision was automatically updated to reflect the committed changes.