Add Beaglebone Black support to GENERIC

[andrew]

Summary

• Allow the Cortex-A8 to boot a SMP kernel by only setting PRRR_NS1 when we have MP extensions.
• Only use ARM_HAVE_MP_EXTENSIONS to determine if we should use the IS register variants.
• Add the Ti bits from the BEAGLEBONE config to GENERIC

Test Plan

I've only booted on a Beaglebone Black.
Someone should check if GENERIC still boots on existing hardware supported
by GENERIC.

[manu]

Just successfully booted my olimex a20-som-evb with this patch.

[imp]

looks reasonable to me, haven't tested it on my BBB though.

[mmel]

Removal of "defined SMP" from "#if __ARM_ARCH >= 7 && defined SMP" is bogus. GENERIC kernel must have SMP defined, right? All those macros are unusable on UP kernels and proper #if's works as simple but valuable safe keeper.

[andrew]

In D8335#173687, @meloun-miracle-cz wrote:

Removal of "defined SMP" from "#if __ARM_ARCH >= 7 && defined SMP" is bogus. GENERIC kernel must have SMP defined, right?

Why?

All those macros are unusable on UP kernels and proper #if's works as simple but valuable safe keeper.

No, the macros are unable to be executed on Cortex-A8. This doesn't mean they are unable to be included in a kernel, just that we shouldn't execute them.

There are cases where we may need them in a UP kernel. From on of your comments in D8092:

"I have system where first CPU core is used for FreeBSD, second one is dedicated for application computing (without kernel), but SMP coherency I still required."

This should work with a UP kernel as FreeBSD is only running on a single core, however this is impossible with the current code.

[mmel]

In D8335#173769, @andrew wrote:

In D8335#173687, @meloun-miracle-cz wrote:

Removal of "defined SMP" from "#if __ARM_ARCH >= 7 && defined SMP" is bogus. GENERIC kernel must have SMP defined, right?

Why?

Because nobody (i hope) want to start using slower (broadcasted) version of TLB operation for UP kernel..

All those macros are unusable on UP kernels and proper #if's works as simple but valuable safe keeper.

No, the macros are unable to be executed on Cortex-A8. This doesn't mean they are unable to be included in a kernel, just that we shouldn't execute them.

That's not a true. MP extensions are mandatory only for A15. All other may exist without it. And there are single core SOCs (to be fair, I have no idea if these have MP implemented or not).

There are cases where we may need them in a UP kernel. From on of your comments in D8092:

"I have system where first CPU core is used for FreeBSD, second one is dedicated for application computing (without kernel), but SMP coherency I still required."

This should work with a UP kernel as FreeBSD is only running on a single core, however this is impossible with the current code.

No, my comment was about SMP kernel running on single core, not about UP kernel. So (currently) all works as expected.

With current code, we can run UP kernel on dual core CPU without disturbing other core by TLB (or cache) broadcasts in non-coherent mode, or we can run SMP kernel on single core while other CPU is SMP coherent.
I don't want to break this model.

For me, right case is to have compiled non-broadcasted version for UP kernel, broadcasted version for SMP kernel and runtime selected version for GENERIC kernel only.

[andrew]

Rename ARM_HAVE_MP_EXTENSIONS to ARM_USE_MP_EXTENSIONS
Only check cpuinfo.mp_ext when SMP is enabled

[mmel]

Thanks !
Just only note - what about CPU_CORTEX _GENERIC ?

[andrew]

What do you mean about CPU_CORTEX _GENERIC?