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Differential D6129

Implement PIC_CONFIG interface in GICv3 driver
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Authored by mst_semihalf.com on Apr 27 2016, 4:32 PM.
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arm64

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zbb
andrew
• ian
Summary

The trigger and polarity of SPI interrupts will be set by configuring the GICD_ICFGR register.

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rS FreeBSD src repository - subversion
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sys/
arm64/
arm64/
99 lines
22 lines
6 lines
13 lines

Diff 15661

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sys/arm64/arm64/gic_v3.c

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sys/arm64/arm64/gic_v3_its.c

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sys/arm64/arm64/gic_v3_reg.h

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sys/arm64/arm64/gic_v3_var.h

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