ti_sdhci: offload the MMC data phase to EDMA3

[rick_sloservers.com]

Summary

ti_sdhci only does PIO, so reading from microSD on am335x keeps the CPU
about 90% busy, mostly in interrupt context. sdhci(4) DMA can't be used
instead, since master DMA is not available on this SoC (AM335x TRM,
Table 18-1).

Use the sdhci(4) platform transfer hooks to move the data phase with
EDMA3, the way bcm2835_sdhci uses its own DMA engine. The controller
and channels come from the node's "dmas" property. Reads now use about
6% CPU at the same speed.

Test Plan

Tested on a BeagleBone Black Rev B3 with microSD and eMMC. Reads are about as fast as with PIO, around 20 MB/s, but use about 6% CPU instead of 93%. Data written with PIO reads back the same through DMA and the other way around, on both the microSD and the eMMC. No DMA errors were logged and the board rebooted cleanly several times.

[rick_sloservers.com]

Updated to use the new ti_edma3 interface from D59124.