aw_rtc: bump settime() delays

[mhorne]

Summary

There are delay loops, checking the BUSY status bit, before writing to
the date or time registers. Each iteration contains a 1usec delay, for a
maximum of 70 iterations.

This is frequently not enough on the D1 platform, where the message is
emitted:

rtc0: could not set date, RTC busy

Bump the loop delay to 10usecs each, and the maximum number of
iterations to 150, for a maximum delay of 1.5msecs between each write of
the register.

In my testing this seems to be adequate.

The loop variable is renamed for clarity/simplicity.

Test Plan

I (roughly) measured the required number of loops on my hardware.

At DELAY(1):

rtc0: first read took 0 iterations
rtc0: second read took 156 iterations
rtc0: third read took 169 iterations

At DELAY(10):

rtc0: first read took 0 iterations
rtc0: second read took 127 iterations
rtc0: third read took 117 iterations